1 / 22

Advances in LAL Chip Technology for SiPM: New PCB for Improved Performance

This document outlines the modifications and advancements made in the LAL chip designed for Silicon Photomultipliers (SiPM) based on research from Dubna. Version #1 of the chip features an updated input capacitor and dynamic range. It highlights the need for a new PCB to test Version #2, which promises to enhance direct digitization with improved specifications. Key aspects include performance metrics at 100 MHz, 10-bit ADC, and self-trigger functionalities. Detailed measurements and results illustrate the effectiveness of these enhancements in SiPM applications.

iokina
Télécharger la présentation

Advances in LAL Chip Technology for SiPM: New PCB for Improved Performance

An Image/Link below is provided (as is) to download presentation Download Policy: Content on the Website is provided to you AS IS for your information and personal use and may not be sold / licensed / shared on other websites without getting consent from its author. Content is provided to you AS IS for your information and personal use only. Download presentation by click this link. While downloading, if for some reason you are not able to download a presentation, the publisher may have deleted the file from their server. During download, if you can't get a presentation, the file might be deleted by the publisher.

E N D

Presentation Transcript

  1. VFE electronics for SiPM Dubna 29.01.2004 Valery Jejer Viatcheslav Slepnev Igor Tyapkin Sergei Basylev

  2. LAL chip • Version #1 (modified) – 12mv/fQ • Input capacitor reduced to 1pF • Dynamic range 100mv (input signal) • We need factor 10. • Version #2 of LAL chip may work. • To test it we will need new PCB!?

  3. Direct digitization -E 10 kOhm FPGA SiPM ADC 100 MHz 10 bit Amp. Data 470 Ohm 51 Ohm

  4. 2-3 PE Kamp.=10 E=38.8 v

  5. 5 PE 241,7 13,9

  6. 20 PE 360,8 21,7 Self trigger -180 Integral over 50 nsec

  7. ~70 PE

  8. ~9ch/PE 2-3 PE No light Vsipm=0 Self trigger

  9. ~5 PE Kamp.=1

  10. ~20 PE Kamp.=1

  11. ~50 PE

  12. 0 pe 7 pe 20 pe 50 pe 0 pe 154,4 1,1 7 pe 159,1 1,2 25% 20 pe 170,2 1,7 7,5% 50 pe 188,7 2.5 7,3%

  13. RC 30 sec

  14. 0 154,2 0,7 10 pe 161,3 0,8 11,3% 40 pe 170,9 1,2 7,1% 80pe 187,2 1,7 5,1%

  15. 50 MHz

  16. 0 154,6 0,9 10 pe 166,7 1,6 13% 40 pe 184,2 2,2 7,4% 80pe 213,1 2,4 4,1% 0 153,3 0,8 10 pe 164,3 1,7 15% 40 pe 180,2 2,4 9,3% 80pe 212,1 2,5 4,2%

  17. FPGA ADC 100 MHz 10 bit Amp. Direct digitization 100 MHz, 10 bit 2 6 2 10 50 MHz, 8 bit 2 3 1,5 6,5 50 MHz, 8 bit 3 1,5 4,5

  18. Semi DHCAL 80 pe 10 pe

  19. 0 5 10 20 40 80 pe

  20. Measurement of a pulse duration -E 10 kOhm FPGA SiPM Amp. Data 470 Ohm 51 Ohm

  21. 0 10 20 40

  22. 40 10

More Related