1 / 34

340 likes | 527 Vues

EE204 Computer Architecture. Lecture 03- ALU. Limits of Computer Numbers. Bits can represent anything! Characters? 26 letter => 5 bits upper/lower case + punctuation => 7 bits (in 8) rest of the world’s languages => 16 bits (unicode) Logical values? 0 -> False, 1 => True colors ?

Télécharger la présentation
## EE204 Computer Architecture

**An Image/Link below is provided (as is) to download presentation**
Download Policy: Content on the Website is provided to you AS IS for your information and personal use and may not be sold / licensed / shared on other websites without getting consent from its author.
Content is provided to you AS IS for your information and personal use only.
Download presentation by click this link.
While downloading, if for some reason you are not able to download a presentation, the publisher may have deleted the file from their server.
During download, if you can't get a presentation, the file might be deleted by the publisher.

E N D

**EE204Computer Architecture**Lecture 03- ALU Hina Anwar Khan 2011**Limits of Computer Numbers**• Bits can represent anything! • Characters? • 26 letter => 5 bits • upper/lower case + punctuation => 7 bits (in 8) • rest of the world’s languages => 16 bits (unicode) • Logical values? • 0 -> False, 1 => True • colors ? • locations / addresses? commands? • but N bits => only 2N things Hina Anwar Khan Spring 2011**Arithmetic Operations**• Numbers represented in binary • Positive & Negative numbers ? • Largest Number ? • Result larger than largest number? • Fractions & real numbers representation? • Hardware add, subtract, multiply, divide? Hina Anwar Khan Spring 2011**Positive & Negative Numbers**• So far, unsigned numbers • Obvious solution: define leftmost bit to be sign! • Representation called sign and magnitude • MIPS uses 32-bit integers. +1ten would be: 0000 0000 0000 0000 0000 0000 0000 0001 • And - 1ten in sign and magnitude would be: 1000 0000 0000 0000 0000 0000 0000 0001 • Arithmetic circuit more complicated • Special steps depending whether signs are the same or not Hina Anwar Khan Spring 2011**2’s Complement Number line**00000 11111 00001 11100 • 2 N-1 non-negatives • 2 N-1 negatives • one zero • how many positives? • comparison? • overflow? 00010 0 -1 1 2 -2 . . . . . . 15 -15 -16 01111 10001 10000 Hina Anwar Khan Spring 2011**Two’s Complement Formula**• Can represent positive and negative numbers in terms of the bit value times a power of 2: • d31 x -231+ d30 x 230 + ... + d2 x 22 + d1 x 21 + d0 x 20 • Example1111 1111 1111 1111 1111 1111 1111 1100two = 1x-231+1x230 +1x229+...+1x22+0x21+0x20 = -231+ 230 + 229 + ...+ 22 + 0 + 0 = -2,147,483,648ten + 2,147,483,644ten = -4ten • Note: need to specify width: we use 32 bits Hina Anwar Khan Spring 2011**Sign extension**• Convert 2’s complement number using n bits to more than n bits • Simply replicate the most significant bit (sign bit) of smaller to fill new bits • 2’s comp. positive number has infinite 0s • 2’s comp. negative number has infinite 1s • 16-bit -4ten to 32-bit: 1111 1111 1111 1100two 1111 1111 1111 1111 1111 1111 1111 1100two Hina Anwar Khan Spring 2011**Signed v. Unsigned Comparisons**• X = 1111 1111 1111 1111 1111 1111 1111 1100two • Y = 0011 1011 1001 1010 1000 1010 0000 0000two • Is X > Y? • unsigned: YES • signed: NO • Converting to decimal to check • Signed comparison: -4ten < 1,000,000,000ten? • Unsigned comparison: -4,294,967,292ten < 1,000,000,000ten? • slt, slti and sltu, sltiu instructions Hina Anwar Khan Spring 2011**Numbers are stored at addresses**00000 • Memory is a place to store bits • A word is a fixed number of bits (eg, 32) at an address • also fixed no. of bits • Addresses are naturally represented as unsigned numbers 01110 101101100110 11111 = 2k - 1 Hina Anwar Khan Spring 2011**Addition & Subtraction**• Addition: Binary Addition • Subtraction: Binary 2’s comp. Addition • Overflow • Adding two positive numbers • Adding two negative numbers • add, addi, sub • Cause exception on overflow • addu, addiu, subu • Cause no exception on overflow Hina Anwar Khan Spring 2011**Determining Overflow**0111 (+7) 0111 (+7) 0101 (+5)1011 (-5) 1100 (-4) 10010 (+2) 1001 (-7) 1001 (-7) 0101 (+5)1011 (-5) 1110 (-2) 10100 (+4) Overflow occurs when the signs of the values are the same, and the sign of the result is different. Overflow if Cin to MSB is different from Cout of MSB Hina Anwar Khan Spring 2011**Arithmetic and Logic Unit**• The ALU is at the heart of the CPU • Does math and logic • The ALU is primarily involved in R-type instructions • Perform an operation on two registers and produce a result • Where is the operation specified? • The instruction type specifies the operation • The ALU will have to be controlled by the instruction opcode Hina Anwar Khan Spring 2011**Arithmetic Logic Unit (ALU)**Hina Anwar Khan Spring 2011**0**1 ALU - Logic Operations Start out by supporting AND and OR operations Operation 2-to-1 Mux A Result B If Operation = 0, Result = A • BIf Operation = 1, Result = A Ú B Two operands, two results.We need only one result... The Operation input comes from logic that looks at the opcode Hina Anwar Khan Spring 2011**cin**0 1 ab 00 01 11 10 Arithmetic Unit Hina Anwar Khan Spring 2011**Arithmetic Unit**Hina Anwar Khan Spring 2011**Operation**A 0 0 Result 1 1 Cin Op (2 bits) + 2 B Cin A Result ALU B Cout Cout Adding to our ALU (Op is now 2 bits) CarryIn Operation Function 00 A • B 01 A Ú B 10 A + B Add an Adder CarryOut Connect CarryIn (from previous bit) and CarryOut (to next bit) Expand Mux to 3-to-1 (Op is now 2 bits) Hina Anwar Khan Spring 2011**1-bit & 32-bit ALU**• Stack 32 of our 1-bit ALU’s together • Each one gets one bit from A and one from B • Connect to common Operation controls • Now we can do 32-bit AND and OR operations • Connect Cout’s to Cin’s • Now, 32-bit adds will work • Note: Carry will ripple through the stages, one at a time • Ripple-Carry Adder Hina Anwar Khan Spring 2011**Operation**CarryIn • Our ALU can add now, but what about subtraction? • To compute A - B, we can instead compute A + (-B) • In 2’s complement, -B = B + 1 A 0 1 Result 0 + 2 • Add an inverter, and a signal BInvert to get B 1 CarryOut Subtracting Set to 1 for LSB BInvert B B • Now, how about that +1? • CarryIn to LSB is unused (always zero) • Set it to 1! • Subtraction just sets BInvert and Cin to 1 For subtraction: Set CarryInof LSB to 1, Set BInvert to 1 Hina Anwar Khan Spring 2011**Subtraction**Hina Anwar Khan Spring 2011**Operation**BInvert CarryIn A 0 0 1 1 Result B 0 + 2 2 1 3 CarryOut Support for SLT • We need to support the SLT operation • Set Result to 0000 0000 0000 0000 0000 0000 0000 0001if A <B • A<B is equivalent to(A - B) < 0 • Subtract B from A • If the result is negative, then set LSB of Result to ‘1’, all others to ‘0’ • The result is negative if the MSB after the subtraction is ‘1’ (Two’s complement) Less Less will be ‘0’ for bits 1-31, special for bit 0 We’re going to have to do something differentfor the MSB and the LSB Hina Anwar Khan Spring 2011**Operation**BInvert CarryIn A 0 1 Result B 0 + 2 1 Less 3 MSB Only CarryOut That tricky MSB • To properly execute the SLT, we need to Set the LSB if the MSB is ‘1’ • (After a subtraction) • Can’t use the ‘Result’ of the MSB • Op will set the Mux to the ‘Less’ Field • Bring out the adder output directly: ‘Set’ Set • Also, we need to check for overflow • Overflow if Cin to MSB is different from Cout of MSB OverFlow Hina Anwar Khan Spring 2011**Supporting the SLT instruction**Hina Anwar Khan Spring 2011**Implementing slt instruction**Hina Anwar Khan Spring 2011**32-bit ALU with Zero detector**Hina Anwar Khan Spring 2011**ALU**Hina Anwar Khan Spring 2011**How fast can 32-bit ALU add?**• Carry propagates through the adders • 64-bit adder slower than 32-bit adder • Solution? • Look-Ahead Carry Generator Hina Anwar Khan Spring 2011**Problem: ripple carry adder is slow**• Is a 32-bit ALU as fast as a 1-bit ALU? c1 = b0c0 + a0c0 +a0b0 c2 = b1c1 + a1c1 +a1b1 c2 = c3 = b2c2 + a2c2 +a2b2 c3 = c4 = b3c3 + a3c3 +a3b3 c4 = Not feasible! Why? Hina Anwar Khan Spring 2011**Carry-lookahead adder**• An approach in-between our two extremes • Motivation: • If we didn't know the value of carry-in, what could we do? • When would we always generate a carry? gi = ai bi • When would we propagate the carry? pi = ai + bi • Did we get rid of the ripple? c1 = g0 + p0c0 c2 = g1 + p1c1 c2 = c3 = g2 + p2c2 c3 = c4 = g3 + p3c3 c4 =Feasible! Why? Hina Anwar Khan Spring 2011**Use principle to build bigger adders**• Can’t build a 16 bit adder this way... (too big) • Could use ripple carry of 4-bit CLA adders • Better: use the CLA principle again! Hina Anwar Khan Spring 2011**Carry Look-Ahead Generator**Hina Anwar Khan Spring 2011**1-bit Full Adder**Hina Anwar Khan Spring 2011**Carry Generate & Propagate**where Hina Anwar Khan Spring 2011**Look-Ahead Carry Generator**Hina Anwar Khan Spring 2011

More Related