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Real-Time Corrective

Real-Time Corrective. Real-time Structure. Computational time: < 5 min. Real-time Corrective Algorithm. Real-time Corrective Topology Control Examples.

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Real-Time Corrective

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  1. Real-Time Corrective

  2. Real-time Structure • Computational time: < 5 min.

  3. Real-time Corrective Algorithm

  4. Real-time Corrective Topology Control Examples • PJM (2010) Manual 3: Transmission Operations. http://www.pjm.com/markets-and-operations/compliance/nerc-standards/~/media/documents/manuals/m03.ashx • Sunnyside-Torrey 138 kV Operating Guide (AEP Operating Memo T029) • Historically, the Sunnyside-Torrey 138 kV overloads on the outage of the South Canton – Torrey 138 kV line. Opening the S.E. Canton 138 kV CB at Sunnyside will help to reduce the post-contingency flow on the Sunnyside-Torrey 138 kV line. • Page 107

  5. Superstorm Sandy • PJM lost 82 bulk electric facilities • 6 500kV facilities; 3 345kV facilities; 39 230kV facilities; 25 138kV facilities • Caused extremely high voltage on the system during low load levels • “We were dealing with extremely high voltage on the system but a switching plan was developed to help alleviate these conditions.” • Via Andy Ott, VP of PJM: several 500kV lines were switched out to mitigate over voltage concerns during these low load level periods

  6. Real-time Corrective Application • Real-time applications: • Cascading event mitigation • Malicious attack mitigation • N-1/ N-m events/ Minimize load shedding • Real-time renewable integration • Triggers: • Constraint violation • Loss of elements

  7. Hour Ahead Corrective

  8. Hour Ahead Corrective Structure • Computational time: < 15 min.

  9. Hour Ahead Corrective Algorithm (Renewables)

  10. Hour Ahead Corrective Results IEEE 118-bus Test Case – Base Load 4519 MW Wind uncertainty – ±16% (± 144MW) Reserve: 5% non-wind + 10% wind • For a single contingency multiple switching solutions can be obtained and vice versa • Some contingencies can only be mitigated through corrective switching, in order to avoid load shedding • No need of out of marker correction • If the wind output drops (within the uncertainty set) system may not be N-1 reliable for certain contingencies. • However, with corrective switching stable N-1 solution can be achieve

  11. Hour Ahead Preventive

  12. Hour Ahead Preventive Structure • Computational time: < 15 min.

  13. Hour Ahead Preventive Algorithm (Renewables)

  14. Day Ahead Corrective

  15. Day Ahead Corrective Structure • Computational time: 2-3 hrs.

  16. Day Ahead Corrective Algorithm

  17. Day Ahead RATC Corrective Results IEEE 118-bus Test Case – Base Load 4519 MW Demand uncertainty – ±6% (± 152MW) Reserve: 5% hydro + 7% non-hydro • For a single contingency multiple switching solutions can be obtained and vice versa • Some contingencies can only be mitigated through corrective switching, in order to avoid load shedding • No need of out of marker correction • If the wind output drops (within the uncertainty set) system may not be N-1 reliable for certain contingencies. • However, with corrective switching stable N-1 solution can be achieve

  18. Day Ahead Market/Economic Based

  19. Day Ahead Market Based Structure • Computational time: 2-3 hrs.

  20. Day Ahead Market Based Algorithm

  21. Day Ahead Market Based RATC Results

  22. RATC Impact on Out of Market Corrections • Market models (day-ahead, hour-ahead) do not guarantee N-1 feasibility • RATC reduces contingency violations • RATC reduces costly out of market corrections Market Model Out of Market Corrections Contingency Analysis

  23. RATC Algorithms

  24. Topology Control Algorithms • Greedy algorithm • Based on a sensitivity analysis • MIP heuristic • Finds the best single switching action • Either of these algorithms are triggered by the particular operator depending upon the application

  25. Greedy algorithm and MIP Heuristic • Inputs: • System states - • Topology processor • Outputs: • Dispatch and switching actions (and sequence of actions)

  26. Greedy Algorithm

  27. MIP Heuristic

  28. AC and Stability Check (NOTE: this section will likely be deleted)

  29. AC Feasibility and System Stability • Inputs: • System states - • Topology processor • Switching action to test • Outputs: • AC feasible – Yes/No • System stability – Yes/No

  30. AC Feasibility and System Stability

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