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Temperature-constrained Power Control for Chip-level Multiprocessors

Temperature-constrained Power Control for Chip-level Multiprocessors. Yefu Wang and Kai Ma. Project Goals and Assumptions. Control power consumption of multi-core CPU by CPU frequency scaling Assumptions: Each core can be scaled individually Each core has a different

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Temperature-constrained Power Control for Chip-level Multiprocessors

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  1. Temperature-constrained Power Control for Chip-level Multiprocessors Yefu Wang and Kai Ma

  2. Project Goals and Assumptions • Control power consumption of multi-core CPU by CPU frequency scaling • Assumptions: • Each core can be scaled individually • Each core has a different frequency-power curve

  3. Progresses Power set point Controller • System design • Initial results on modeling • Experimental setup • Real system experiment • Simulation • Initial experimental results Per-core Temperature CPU Power Power sensor Temperature sensors Frequency modulator CPU Per-core frequency level

  4. System Design: Over Heating Protection • Basic idea: using temperature as a constraint. In each control period, the control signal (frequency of each core) should not exceed its safe region. • Method: model based prediction.

  5. Initial Results on Modeling • Power model • Use the same model as a recent paper • Temperature model • Use similar model described in a previous paper • Future work: derive such an linear constraint from a temperature model: • We may change these soon Xiaorui Wang, and Ming Chen, "Cluster-level Feedback Power Control for Performance Optimization",  the 14th IEEE International Symposium on High-Performance Computer Architecture (HPCA 2008) tp: Total power of all cores d: Frequency change Kevin Skadron, Tarek F. Abdelzaher, Mircea R. Stan: Control-Theoretic Techniques and Thermal-RC Modeling for Accurate and Localized Dynamic Thermal Management. HPCA 2002 M, C: Constant

  6. Optimization Problem Minimize: Control Accuracy Performance optimization s.t. Physical frequency Core grouping Power budget Overheating protection

  7. Experimental Setup (1) • CPU Intel Xeon 5365 • Per-core frequency scaling support?

  8. Experimental Setup (2) • Power monitor: big picture CanturkIsci , Margaret Martonosi, Runtime Power Monitoring in High-End Processors: Methodology and Empirical Data, Proceedings of the 36th annual IEEE/ACM International Symposium on Microarchitecture Wu, W., etc. 2006. A systematic method for functional unit power estimation in microprocessors. In Proceedings of the 43rd Annual Conference on Design Automation

  9. Experimental Setup (3) • Power monitor • CPU power supply • Current clamp (clamp on meter) • Digital multi-meter • USBTMC device driver (USB Test & Measurement Class ) • Temperature monitor • lm-sensors interface • Core-temp device driver

  10. Simulation Setup (1) • Simulation methodology: SESC+Wattch+CACTI+Orion+HotSpot • SESC • SESC is a cycle accurate architectural simulator. It models a very wide set of architectures: single processors, CMPs, PIMs, and thread level speculation.http://sesc.sourceforge.net/ • To get CPU working status, like how instructions are decoded by instruction decoder, and the working status of branch prediction unit, pipeline, stage, memory access record.

  11. Simulation Setup (2) • Watth • “WATTCH” is an architectural simulator that estimates CPU power consumption. • CACTI • CACTI is an integrated cache and memory access time, cycle time, area, leakage, and dynamic power model. • Most useful paper is the official technical report released by HPL • Orion • The most useful paper: Orion A Power-Performance Simulator for Interconnection Networks

  12. Simulation Setup (3) • HotSpot • HotSpot is an accurate and fast thermal model suitable for use in architectural studies. • The most useful papers: 1 A static power model for architects 2 Wattch: A framework for architectural-level power analysis and optimizations

  13. How They Work Together • Our approach: use SESC as framework • Specifically, wrap Wattch,CACTI, Orion, HotSpot, each one into one function separately,and call these functions in one callback function in SESC thermal class.

  14. How to Scale Processor • Base on GaThermAMD and Alpha 21364 • Floor plan

  15. Initial Experimental Results If Power > set point frequency-=step; Else frequency+=step; Force_CPU_frequency (frequency); • Ad-hoc controller • Keeping CPU frequencies of all cores to be the same

  16. Who Is Doing What Next Step: TheoreticalController

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