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Updates on Scintillator Lab Space and New Hardware for DT Group in B21-1-067

The DT group will soon have approximately 37 m² of new lab space available in B21-1-067, with 10 m² easily convertible to a dark lab by early November. Renovations may be needed. Ordered equipment includes two OWIS LTM-80M linear motion stages with controllers, allowing XY configuration and supporting C, C++, and LabView drivers, to be delivered in week 46. Additionally, procurement of components for a monochromatic electron source is underway, alongside an exchange of the SPIROC readout option that provides enhanced channel performance through new evaluation boards.

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Updates on Scintillator Lab Space and New Hardware for DT Group in B21-1-067

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  1. Update on scintillator lab and hardware DT group will make lab space available in B21-1-067. About 37 m2, of which 10 m2 could easily be transformed to a dark lab. Space becomes available early November. Some renovation may be needed.

  2. 2 linear motion stages OWIS LTM-80M plus 2 controllers have been ordered. Travel 170 mm. The stages can be mounted in XY configuration. Controllers come with C, C++ and Labview drivers. Delivery week 46. OWIS (Germany) offered the best compromise between precision, robustness and price.

  3. Production and procurement of components for monochromatic electron source launched. We produce actually 2 identical devices (the other one is for DT group). Tungsten pieces  UK company via the CERN main workshop. Follow-up by Raphael Dumps. Conventional pieces  Ilia Krasin Coil winding  Pierre-Ange Guidici Sr-90 source (350-400 MBq!!!)  procurement via RP Not to scale

  4. The SPIROC readout option Exchange with OMEGA/Orsay (Ludovic Raux, Stephane Callier) Omega offers an evaluation board which allows to read one SPIROC ASIC (32 channels). The chip offers, for each channel, two parallel AC coupled voltage preamplifiers. Read out of the charge from 1 to 2000 photoelectrons with a photoelectron to noise ratio of 10. Two variable shapers are used to reduce noise; each of them has an adjustable peaking time from 25 to 175ns TDC and an ADC are embedded inside the chip. The chip provides also the bias to the SiPM, individually adjustable within a 5V range. The test board is provided with a Labview software which controls the board through a USB interface. This software allows to program the chip, control the FPGA and perform acquisitions. Price: 1600 EUR for 1 board / 1 chip. Availability: end of the year.

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