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PCI core

TPC RCU prototype I. Commercial OEM-PCI board ALTERA FPGA APEX EP20K400 SRAM 32k x 16 PMC I/O connectors (178 pins) Buffered I/O (80 pins). FEE boards. trigger. FEE-bus daughter board. PMC. PCI bus. FPGA APEX20k400. PCI core. Glue logic. I/O. S IU card. internal SRAM.

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PCI core

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  1. TPC RCU prototype I • Commercial OEM-PCI board • ALTERA FPGA APEX EP20K400 • SRAM 32k x 16 • PMC I/O connectors (178 pins) • Buffered I/O (80 pins) FEE boards trigger FEE-bus daughter board PMC PCI bus FPGA APEX20k400 PCI core Glue logic I/O SIU card internal SRAM 32k x 16 FLASH EEPROM onboard SRAM

  2. TPC RCU prototype II SC TTC FEE-bus PCI bus Memory D32 SIU-CMC interface FPGA PCI core Glue logic 2 MB SIU card internal SRAM > 2 MB FLASH EEPROM Memory D32

  3. RCU test system FEE-boards RCU Trigger FEE-bus SIU LINUX: DATE PCI-tools FPGA PCI bridge interface SIU SRAM PCI bus pRORC DDL DIU LINUX: DATE PCI-tools Glue logic PCI bridge interface DIU PCI bus

  4. Programming model • Data/Command path • Message passing model • Production version FEE command (”blabla_ALTRO”, , ,) DATE PCI-tools API LINUX-driver DIU command decoder PCI core mailboxes fifos DDL protocol SIU command decoder RCU command decoder RCU SM Design phase Prototype Final version

  5. Programming model • Data/Command path • Message passing via PCI • Development version DATE PCI-tools API LINUX-driver PCI core mailboxes fifos RCU FEE controller RCU SIU emulator SIU command decoder FEE bus DDL ALTRO Design phase Prototype Final version

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