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PhD Research High Performance Computing

PhD Research High Performance Computing. R Govindarajan Matthew Jacob SERC/CSA, IISc. Computer Architecture. Key Tool: Simulation. Experiments are often conducted using discrete event simulation Prototyping is typically not an option

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PhD Research High Performance Computing

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  1. PhD ResearchHigh Performance Computing R Govindarajan Matthew Jacob SERC/CSA, IISc

  2. Computer Architecture

  3. Key Tool: Simulation • Experiments are often conducted using discrete event simulation • Prototyping is typically not an option • Accurate simulators are large, intricate programs that run for long time durations • Important decision: Choice of • Simulator • Simulation methodology

  4. Key Publication Venues • ISCA: ACM/IEEE International Symposium on Computer Architecture (Jun) • HPCA: IEEE International Symposium on High Performance Computer Architecture (Feb) • MICRO: IEEE International Conference on Microarchitecture (Dec) • ASPLOS (Mar), PACT (Sep)

  5. Current Research Areas

  6. Paper Sessions at ISCA 2010 • Energy Efficiency • Caches • Emerging Technologies and Interconnect • Memory Subsystems • Productivity and Debugging • Acceleration Architecture • Threading • Simulation Technologies and Real System Evaluation • Cluster and Data Center • Security • Multi-Core • Reliability and Fault-tolerance • Translation Caching: Skip, Don't Walk (the Page Table) • High Performance Cache Replacement Using Re-Reference Interval Prediction (RRIP) • The Virtual Write Queue: Coordinating DRAM and Last-Level Cache Policies • Reducing Cache Power with Low-Cost, Multi-Bit Error Correcting Codes

  7. Current Research Areas • Memory • Hierarchy • Technology • Consistency

  8. Current Research Areas • Memory • Prediction, Speculation, Prefetching • Power efficiency • Multicore architecture

  9. Moore’s Law Wikimedia, Intel

  10. Multicore Die Photos AMD dual core Sun UltraSparc multicore Intel Core i7 AMD, Sun, Intel, Benchmark Reviews

  11. Multicore Cache Hierarchy Core Core Core Core Core Core Core Core L1 L1 L1 L1 L1 L1 L1 L1 L2 L2 L2 L2 L2

  12. Current Research Areas • Memory • Prediction, Speculation, Prefetching • Power efficiency • Multicore architecture • Memory hierarchy • Interconnect • Core design • Transactional memory

  13. One Writing Guideline • Every sentence should follow from • a preceding sentence • an experimental observation • a reported result from a cited publication • “it is believed that”, “we think that”, “this is probably due to”

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