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Clock and Trigger Status

Clock and Trigger Status. T . Blažek, V . Černý , M . Kovaľ , R. Lietava Comenius University Bratislava M. Krivda University of Birmingham. Outline. Final setup for 11 detectors Installation status (02.06. – 03.06.) Cabling Tests and TODO LTU+TTCex inventory

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Clock and Trigger Status

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  1. Clock and Trigger Status T. Blažek, V. Černý, M. Kovaľ, R.Lietava ComeniusUniversity Bratislava M. Krivda UniversityofBirmingham

  2. Outline • Final setup for 11 detectors • Installation status (02.06. – 03.06.) • Cabling • Tests and TODO • LTU+TTCex inventory • LTU firmware update (v.21) • Choke / Error triggers in standalone mode • Start signal delay TTC system update

  3. Clock distribution and trigger flow Triggers Sync. card 40 MHz clock source Trigger inputs L0TP CHOKE/ ERROR TTC Clock + Triggers TTC partition . . . . . . . . . . . . . . . . . . . LTU 1 + TTCex LTU 2 + TTCex LTU 3 + TTCex LTU 11 + TTCex . . . . . . . . . . . . . . . . . . . . . . . TTCrx TTCrx TTCrx TTCrx . . . . . . . . . . . . . . . . . . . . . . . QPLL QPLL QPLL QPLL FEE FEE FEE FEE TTC system update

  4. 11 TTC partitions – final setup Cabling DONE: LTU ↔ TTCex Clock → TTCex TALK → LTU SoB/EoB → LTU Original VME crate: 1 x VME processor 11 x LTU 2 x TTCit Cabling TODO: Choke/Error Optical fibres New VME crate: 11 x TTCex 1 x Clock FO Photo: 2014-06-03 TTC system update

  5. Installation notes • First tests: 11 LTU+TTCex partitions working correctly • Tested using TTCit board; TALK periodic trigger, LTUs in global mode • One issue: TTCex (CHOD - SN21) 1st laser not working (red cap) • Proper tests needed (Dry run with TEL62) • TODO: • Synchronization with TALK (or L0TP) using toggle signal • CANBUS connection (new crate) → DCS • VME processor: SLC5 → SLC6 upgrade (this week) • LTU DIM servers • Detailed Twiki documentation of the setup TTC system update

  6. LTU & TTCex inventory • https://twiki.cern.ch/twiki/bin/view/NA62/TdaqLogistics • LTU and TTCex orders • https://twiki.cern.ch/twiki/bin/view/NA62/TdaqHWDistribution • Current status, green = new : (**) TDAQ TTCex temporarily assigned for GTK (*) Terminating resistor on L0 input (****) 1st laser not working (***) Laser indicating LED not working, lasers are OK TTC system update

  7. LTU & TTCexinventory (2) • 1 LTU+TTCex setup in Marian’s trigger LAB • No other spare NA62 LTUs • ALICE LTUs can be used with limited functionality in LAB • Consult with Marian • Sub-detectors which ordered 1 LTU, but have 1 more in LAB: • CEDAR, CHANTI, RICH • The LTUs belong to: GTK, STRAW, LKR/L0 TTC system update

  8. LTU firmware update • https://twiki.cern.ch/twiki/bin/view/NA62/LTUrelatedSoftware • Latest firmware (v. 21) and software • Updated manual • Choke / Error triggers in standalone emulation • Functionality available only if Choke/Error signals are enabled! (special window in the SW) • Choke (Error) input → active state → emulation is paused, Choke (Error) ON trigger is sent • Choke (Error) input → inactivestate → emulation is resumed, Choke (Error) OFFtrigger is sent • Tested in LAB with external input to CH/ERR • Test with TEL62 needed • Start signal delay (requested by Tonino) • Useful in LAB setup with external pulser (latency added) • User can choose the delay of triggers: • 0 μs (default), 20 μs, 100 μs L0 trigger type 0b100100 Choke on 0b100101 Choke off 0b100110 Error on 0b100111 Error off (typo in technical design) TTC system update

  9. Conclusions • Final setup (11 TTC partitions) • LTU+TTCex boards successfully installed, working correctly • Preparing Choke/Error cables • Proper tests needed • Choke / Error trigger firmware implemented • Tested in LAB and ECN3 with external CH/E inputs • TODO: test with TEL62 TTC system update

  10. Spares TTC system update

  11. Setup Proposal from 2014-02 Meeting TTCit 3 TTCit 2 TTCit 1 • VME CPU • 11 LTUs • 3 TTCit LTU 6 LTU 9 LTU 7 LTU 11 LTU 10 VME Master LTU 8 LTU 1 LTU 2 LTU 3 LTU 4 LTU 5 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 • Clock FO for TTCex inputs • 11 TTCex TTCex1 TTCex 8 TTCex2 TTCex3 TTCex4 TTCex5 TTCex 9 TTCex 6 TTCex 7 TTCex 11 TTCex 10 Clock fan-out (ECL) TTC system update 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21

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