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History of 64-bit Computing: AMD64 and Intel Itanium Processors

History of 64-bit Computing: AMD64 and Intel Itanium Processors. Brett Casbeer, Adam Kenny, Chris Kopek, Nick Snead. 64-bit History. “640K ought to be enough for anybody” – Bill Gates 64-bit twice as fast as 32-bits? Benefits of 64-bit technology Applications of 64-bit technology.

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History of 64-bit Computing: AMD64 and Intel Itanium Processors

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  1. History of 64-bit Computing: AMD64 and Intel Itanium Processors Brett Casbeer, Adam Kenny, Chris Kopek, Nick Snead

  2. 64-bit History • “640K ought to be enough for anybody” – Bill Gates • 64-bit twice as fast as 32-bits? • Benefits of 64-bit technology • Applications of 64-bit technology

  3. AMD64 Outline • AMD Athlon 64 Specifications • Operating Modes • Register overview • DDR controller and Hypertransport

  4. AMD Athlon 64 Specifications Infrastructure Socket 754 Number of Transistors 105.9 million 64-bit Instruction Set YES 32-bit Instruction Set YES System Bus Technology Hypertransport Integrated DDR Controller YES On-Chip Cache L1: 128KB L2: 512KB-1024KB Clock-Speed 1.8Ghz-2.4Ghz

  5. AMD64 Operating Modes

  6. AMD64 Register Overview

  7. Reduce Bottlenecks • DDR Memory Controller • Built into CPU • Saves Time • Hypertransport • Transport Speeds • Data packets

  8. Intel Itanium Outline • Itanium Processor Specifications • Itanium Features • Itanium Epic Architecture • IA-64 Instruction Set • IA-64 vs. IA-32

  9. The Itanium Processor

  10. The Itanium Processor • Designed for 1-4000 processor workstations and servers. • Level 3 bus designed for communication between processors • Level 2 cache reduces traffic • Page sizes from 4KB-256MB

  11. Itanium: EPIC Architecture • Explicitly Parallel Instruction Computing • Allows processor to run instructions parallel to other instructions • Instructions “bundled” during the compiler stage • No size limit for the groups of “bundled” instructions

  12. Source Code: if (x == 4) { z = 9; }else z = 0; Using the IA-32 bit architecture the instruction follow this scheme: Compare x to 4 If not equal goto line 5 z = 9 goto line 6 z = 0 // Program continues from here IA-64 Instruction Set

  13. IA-32 bit architecture instruction flow: Compare x to 4 If not equal goto line 5 z = 9 goto line 6 z = 0 // Program continues from here IA-64 bit architecture instruction flow: Compare x to 4 and store result in a predicate bit (we'll call it P) If P==1; z = 9 If P==0; z = 0 IA 64 vs IA 32 architecture

  14. Conclusion • AMD64 • Operating Modes • Long Mode, Legacy Mode • Registers • GPRs, XMM, RIP • Reduce Bottlenecks • DDR Controller, Hypertransport

  15. Conclusion • Intel Specifications and Features • EPIC Architecture • Parallel Computing, Bundled Instructions • IA-64 Instruction Set • IA-64 vs. IA-32

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