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Progress Report of Gigabit Ethernet Design

Progress Report of Gigabit Ethernet Design. ECE 4006A October 18, 2001 Ashley Lee Shaun Rosemond. Test Setup. A) Eye Generation. Evaluation Board. Pattern Generator. Digital Oscilloscope. Rx. Tx. B) BERs. Bit Error Tester. Initial Instrument Settings.

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Progress Report of Gigabit Ethernet Design

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  1. Progress Report of Gigabit Ethernet Design ECE 4006A October 18, 2001 Ashley Lee Shaun Rosemond

  2. Test Setup A) Eye Generation Evaluation Board Pattern Generator Digital Oscilloscope Rx Tx B) BERs Bit Error Tester

  3. Initial Instrument Settings • Pattern Generator (Microwave Logic gigaBERT-1400Tx) • 0.5V amplitude 1GHz square wave • 27-1 Pattern setting • Tektronix TDS 694C Digital Oscilloscope • Channels 1&2 receive ports from module • Channel 3 is clock from pattern generator • Used as trigger source for display

  4. Bit Error Rates • Using 100m SC/SC Fiber • Pattern: 27-1 • 0 errors at 10-11 (100 sec at 1GHz) • Pattern: 223-1 • BER=1.1*10-8 (at 1.2GHz) • BER=6.8*10-6 (at 1.4GHz)

  5. Eye Mask • IEEE standard 802.3z standard eye mask for data transmit of 1000BASE-LX receiver • Defines eye that will allow acceptable data transfer • Function of ratio of eye opening to bit period normalized amplitude

  6. Eye Diagrams

  7. Validation of the Eye • Green – Eye Mask Inscribed in Opening • Red – Ratio between bit period and eye opening ~ 80% • Blue – Normalized Amplitude ~ 75%

  8. Design Issues • Veering Pins • Power Supply Connectivity • Interference during Testing

  9. Future Design Issues • Signal Detect (Pin 4) – coaxial cable to connect to Intel Board • Prevent Breakage of Soldered Connections on Intel Board • Resistors and Capacitors on Intel Board • SD Pin (Biasing Resistors) • AC Coupling Capacitors • Biasing Resistors (Pins 2 and 3)

  10. Any Questions??

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