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The Serial Communication Interface (SCI) MC9S12-C32

The Serial Communication Interface (SCI) MC9S12-C32. Lecture L4.9. Reference. HCS12 Serial Communications Interface (SCI) Block Guide V02.08. S12SCIV2.pdf. PIM_9C32 Block Diagram. SCI module. SCI. Asynchronous Serial I/O The 68HCS12 SCI Interface Programming the SCI

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The Serial Communication Interface (SCI) MC9S12-C32

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  1. The Serial Communication Interface (SCI)MC9S12-C32 Lecture L4.9

  2. Reference HCS12 Serial Communications Interface (SCI) Block Guide V02.08 S12SCIV2.pdf

  3. PIM_9C32 Block Diagram SCI module

  4. SCI • Asynchronous Serial I/O • The 68HCS12 SCI Interface • Programming the SCI • SCI Interface Using Interrupts

  5. SCI • Asynchronous Serial I/O • The 68HCS12 SCI Interface • Programming the SCI • SCI Interface Using Interrupts

  6. SCI • Asynchronous Serial I/O • The 68HCS12 SCI Interface • Programming the SCI • SCI Interface Using Interrupts

  7. sci.asm ; SCI0 SC0BDH EQU $C8 ;baud rate control SC0CR1 EQU $CA ;SCI control reg 1 SC0CR2 EQU $CB ;SCI control reg 2 SC0SR1 EQU $CC ;SCI status reg SC0DRL EQU $CF ;SCI data reg RDRF EQU $20 ;SCSR mask ; INITIALIZE SCI sci0_init CLR SC0CR1 ;8 bit LDD #52 STD SC0BDH ;9600 baud LDAA #$0C STAA SC0CR2 ;enable tx & rx RTS

  8. ; INPUT BYTE FROM SERIAL PORT INTO A INCHAR LDAA SC0SR1 ;check status ANDA #RDRF ;check rdrf BEQ INCHAR ;wait for char LDAA SC0DRL ;get char in A RTS ; OUTPUT BYTE IN A TO SERIAL PORT OUTPUT TST SC0SR1 BPL OUTPUT ;loop until tdre STAA SC0DRL ;send A RTS

  9. Communicating with a PC

  10. sciecho.asm ; echo char to PC org $4000 sci_echo bsr sci0_init se1 bsr inchar bsr output bra se1 #include sci.asm

  11. SCI • Asynchronous Serial I/O • The 68HCS12 SCI Interface • Programming the SCI • SCI Interface Using Interrupts

  12. ; SCI Interface using interrupts File: SCIINT.WHP ; display characters from PC keyboard on LCD display SC0BDH EQU $C8 ;baud rate control SC0CR1 EQU $CA ;SCI control reg 1 SC0CR2 EQU $CB ;SCI control reg 2 SC0SR1 EQU $CC ;SCI status reg SC0DRL EQU $CF ;SCI data reg RDRF EQU $20 ;SCSR mask SCI0.IVEC EQU $0FD8 ;SCI0 user vector address + 2 ORG $4000 main jsr spi_init ;initialize spi jsr lcd_init ;initialize lcd jsr initq ;initialize queue jsr sci0_init ;initialize sci mn1 jsr checkq ;if queue is empty bcs mn1 ; wait jsr data8 ;store char on LCD ldy #3 jsr ms_delay ;delay ~10 ms bra mn1

  13. ; INITIALIZE SCI sci0_init SEI ;disable interrupts CLR SC0CR1 ;8 bit LDD #52 STD SC0BDH ;9600 baud LDAA #$2C STAA SC0CR2 ;enable tx & rx, RX INT LDD #SCI_INTSER STD SCI0.IVEC ;set sci int vector CLI ;enable interrupts RTS

  14. ; Interrupt service routine: get char and store in queue  SCI_INTSER LDAA SC0SR1 ANDA #RDRF BEQ SI1 ;if RDRF set LDAA SC0DRL ;read data (clears RDRF flag) JSR QSTORE ;and store it in queue SI1 RTI #INCLUDE QUEUE.ASM #INCLUDE LCD.ASM

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