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AIDA Front end electronics

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  1. AIDA Front end electronics Report May 2008 Progress Data compression Plan for prototype delivery AIDA FEE Report

  2. Progress • Investigating Buffer and FADC PCB layout • Checking detector connection board routing. • Specification for utility interface - Metronome • Power supply (50W) options – 12v distribution • FADC interface DDR to parallel conversion AIDA FEE Report

  3. Compression • Max data rate for FEE Gbit link 60MB/sec. • Waveforms are the major contributor to this demand. • Compress the waveforms as they are transferred between memories in the FPGA AIDA FEE Report

  4. Compared lossless methods. 8 sample data sets, 3 types. Each file 128MBytes, compressed in 2000 word “chunks”. Compression for AIDA • Low noise • Noisy • Periodic AIDA FEE Report

  5. Compression for AIDA • Several techniques looked at. • Varying results, all data dependent. • Home-grown method as good as others for this data. • Knowledge of data format/structure. AIDA FEE Report

  6. Compression for AIDA • Minimum+Offset (MO), Data Dictionary (DD), No Compression (NC). • MO usually best, DD best for noisy data. Sometimes NC best. • All improved when bit-packed. • Recommend Minimum+Offset with fallback to No Compression AIDA FEE Report

  7. Milestones for Prototype FEE delivery • Complete Specification : • 1st July 2008 => low risk • Complete Schematic and PCB layout : • 1st Aug 2008. => medium risk • Deliver 6 FEE cards ( 6 weeks ) : • 15th Sept 2008 => low risk • Complete Prototype VHDL : • 1st November 2008 => Medium risk • Commission FEE cards : • 1st December 2008 => High risk • Design ASIC Mezzanine • 1st Aug 2008. => medium risk • Deliver 6 ASIC Mezzanines • 15th Sept 2008 => low risk • Complete Kapton board : • 1st Nov 2008 => low risk AIDA FEE Report

  8. AIDA FEE Report

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