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Sensor testing and validation plans for Phase-1 and Ultimate

Sensor testing and validation plans for Phase-1 and Ultimate

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Sensor testing and validation plans for Phase-1 and Ultimate

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  1. Sensor testing and validation plans for Phase-1 and Ultimate IPHC_HFT 06/15/2009 - LG

  2. Sensor Testing and Validation Plans • We had developed testing plans before the receipt of Phase-1 sensors. • • • After receiving and testing Phase-1, we have updated our testing plans to reflect what we have learned. IPHC_HFT 06/15/2009 - LG

  3. Outline • Phase-1 • Individual testing is shown in the Phase-1 testing talk. • Production testing • Probe testing plans and status • Ultimate • Proposed built in testing functionality. • Using this functionality for individual and production testing. • Testing issues to address. IPHC_HFT 06/15/2009 - LG

  4. Testing ModelTwo types of testing to be employed • Characterization • Individual testing designed to test and characterize all aspects of the sensor function with an emphasis on understanding in detail the characteristics of each functional block of the sensor and how the functional blocks work as a whole. This type of testing is used to evaluate the design and implementation of that design in silicon. • Production testing • Large scale testing of all sensors to be used in the detectors. In our case we intend to test fully sensor interface and functionality. We further intend to test as much as is reasonable to determine whether the sensor meets the required performance specification. The tests that are required to fulfill this are to be discussed. IPHC_HFT 06/15/2009 - LG 4

  5. Phase-1 testing Production testing Plan as originally proposed • We will probably be able to perform only a subset of the tests that we will employ for the • individual testing of this sensor. The tests will need to be scripted and the sensors binned. • Power on tests – • Current draw for digital and analog voltage supplies at power up and during clocked operation. • JTAG testing – test communication with the sensor JTAG system, program and read back registers. • Digital function tests - • Proper operation for clock, SPEAK, START. • Proper operation of the markers. • Proper operation of the test modes including programmed output pattern mode. • Power / clock range test – • Test sensor function with power supply voltage 5% below nominal • Test sensor function with RDO frequency 5% above nominal. • Sensor functional tests – • Test discriminator threshold response on noise. Raise threshold from below noise to above in 3 steps. Check response on digital outputs. • Set the threshold at an appropriate (~5 x noise?) level. Test pixel response to flashed LED. IPHC_HFT 06/15/2009 - LG 5

  6. Phase-1 testing • Individual sensor characterization allows us to find operating points that give comparator transfer functions with optimized widths and offsets. We will scan the bias effects on the transfer function in the set of sensors that we are characterizing to determine the spread of optimized bias settings. If these settings cluster appropriately, we can set the biases globally. Individual sensor thresholds can be set based on the measured IVDREF1 response. • We will be using Phase-1 sensors in the prototype detector that we intend to deploy in STAR. • We will need to modify the previous testing plan based on what we have learned during Phase-1 testing to allow for the selection and necessary characterization of the sensors. • We will need to production test ~ 250 Phase-1 sensors (assuming 50% yield, 1 three sector prototype). IPHC_HFT 06/15/2009 - LG 6

  7. Phase-1 Testing Current Production Testing Plan Power on testing – measure the current draw for digital and analog voltages. Reject sensors that are not within tolerance. Test JTAG function to configure the sensor to return the chip ID and to set and read back the nominal operating condition parameters and test the operation of LINEPATn_REG. Measure the DAC setting versus voltage output for the IKIMO, IVDREF1 and IVDREF2 DAC structures. Set biases as per observation of bias response. Use a flashed LED to find any dead pixels and test general pixel function. The testing and characterization to be done to the smaller sample (2 functioning sensors per wafer) of sensors will consist of the previous list of production testing as well as the following additional characterization. Measure noise at the analog outputs and compare to the hit rate as a function of software discriminator level. Measure discriminator transfer functions and compare to previous references. Use a 55Fe source to generate a spectrum from the analog outputs. Compare this spectrum to the reference. IPHC_HFT 06/15/2009 - LG 7

  8. Phase-1 testing Current testing speed • We have not yet completely optimized our testing system for speed. The times here are shown as indicators for the current scripted automated testing. JTAG accesses takes 120 ms via USB. Characterization testing consists of: 3600 runs take 5200 seconds (87 minutes) for transfer functions at different biases • 24 scans (bias points), each with 150 acquisitions of 10 frames each. • Start takes ~70 ms Fe source Calibration takes ~6 min (2 for noise, 4 for Fe source) IPHC_HFT 06/15/2009 - LG

  9. Probe Testing Architecture (schematic) System Architecture • Sensor thickness = 50 um • Probe pins = 68 • Pad size = 85 um x 130 um • Die size = 21220 um x 19620 um • Scripted testing system based on the existing RDO system. • Same hardware (except for probe card) for Ultimate probe testing system. IPHC_HFT 06/15/2009 - LG

  10. Probe Testing Status • RDO boards, USB=>GPIB module, Probe Station, Control PC, PS all in hand and working. • Probe card schematics finished. • Probe card layout in progress. • Scripted probe testing framework is defined. • Scripted sensor testing is already working for individual sensor characterization and we will incorporate this framework for testing into the overall control system for the automated production testing. • We plan to have probe testing working by September. IPHC_HFT 06/15/2009 - LG 10

  11. Ultimate – proposed functional testing capabilities important IPHC_HFT 06/15/2009 - LG

  12. Ultimate testing • The addition of the SUZE zero-suppression circuit requires us to test sensor function differently than on Phase-1 (multiple steps for each sensor functional block). • Some discussion of this in IPHC-LBNL phone conference. These discussions led to a proposal for automated built-in testing sequences. • Examine possible testing sequences for individual and production testing with proposed testing functionality. IPHC_HFT 06/15/2009 - LG

  13. Ultimate testing • Individual sensor characterization will be needed to determine the operating characteristics of the sensor after it is received. • We may need to modify the testing plan as it is currently envisioned based on what we learn during characterization. We should evaluate what the built in testing functions allow. • We will need to production test ~ 3200 Ultimate sensors (assuming 50% yield and 4 complete detectors). IPHC_HFT 06/15/2009 - LG 13

  14. Ultimate testing IPHC_HFT 06/15/2009 - LG

  15. Ultimate individual testing • JTAG - As per Phase-1. • Characterize the bias point response in the comparator transfer function to select running biases. Compare to the nominal biases. • Sequence of other tests as per Christine’s slide. • Test sensor as a whole for operating characteristics through the pixel-discriminator functional block chain. • LED pulse - read out at register after the comparator blocks, 1 row at a time. This tests the pixel + discriminator. As currently envisioned, there is no way to test the LED pulse through the whole sensor functional block chain (SUZE overflow in row). Note that (2-5) need to be accomplished 1 row at a time (unless auto-increment function is integrated into the sensor test readout). IPHC_HFT 06/15/2009 - LG 15

  16. Ultimate individual testing Comparator transfer function procedure ~10 hrs JTAG access time per bias point setting (at existing speed) • Discriminator transfer function generation sequence. • JTAG access to set threshold. • JTAG access to set row for capture. • Send START to begin RDO. • Read 1 row of data. • JTAG access to set next row for capture. • Send START to begin RDO. • Repeat ~ 1k cycles to capture complete sensor array. • Repeat N times to get statistical sample. • JTAG access to set new threshold. • Repeat ~30 times to map discriminator transfer functions. • Repeat for each bias point setting. IPHC_HFT 06/15/2009 - LG 16

  17. Ultimate individual testing Comparator transfer function with auto-increment ~4 seconds JTAG access time per bias point setting (at existing speed) This results in more than a factor of 104 fewer JTAG accesses. Will the 1152 column readout register have the same readout time as the frame integration time? • Discriminator transfer function generation sequence. • JTAG access to set threshold and auto increment. • Send START to begin RDO. • Read N frames of data. • JTAG access to set new threshold. • Repeat ~30 times to map discriminator transfer functions. • Repeat for each bias point setting. IPHC_HFT 06/15/2009 - LG 17

  18. Ultimate production testing IPHC_HFT 06/15/2009 - LG

  19. Ultimate production testing As in the case of Phase-1, production testing will depend in large measure on what is discovered in individual sensor characterization. The production testing plan, if nominal bias values can be found, can be as described previously (with readout line by line). If additional production testing is required, the auto increment function will be required for testing avoiding the overhead of JTAG accesses and multiple acquisition cycles. IPHC_HFT 06/15/2009 - LG 19

  20. Testing issues to be addressed • Phase-1 • Efficiency testing – need to do beam tests. Options? • Design questions addressed in Phase-1 testing presentation. • Ultimate • Built-in testing functionality… • What is the spec and pad for the serial 1152 column readout? • Auto increment function in register readout for post comparator registers. Can this be implemented? • What is reasonable for production testing of SUZE? • Auto increment function in column space as well would allow for windowing and read out of whole sensor functional block chain through SUZE. Is this desirable? IPHC_HFT 06/15/2009 - LG

  21. end IPHC_HFT 06/15/2009 - LG 21