1 / 11

Design Proposal for Low-Power GPS Chip Navigation System

This presentation outlines the design objectives and proposals for a low-power chip aimed at navigating aircraft to predetermined waypoints. Key aspects include architectural proposals, size estimates, and a detailed project status. Various design elements have been addressed, including schematic design, layout considerations, and Spice simulations. The project focuses on improving performance through a split finite state machine and various calculations, with a specific emphasis on power analysis and interconnect density. Next steps include completing global layout verification (LVS).

shaw
Télécharger la présentation

Design Proposal for Low-Power GPS Chip Navigation System

An Image/Link below is provided (as is) to download presentation Download Policy: Content on the Website is provided to you AS IS for your information and personal use and may not be sold / licensed / shared on other websites without getting consent from its author. Content is provided to you AS IS for your information and personal use only. Download presentation by click this link. While downloading, if for some reason you are not able to download a presentation, the publisher may have deleted the file from their server. During download, if you can't get a presentation, the file might be deleted by the publisher.

E N D

Presentation Transcript

  1. GPS Waypoint Navigation Team M-2: Charles Norman (M2-1) Julio Segundo (M2-2) Nan Li (M2-3) Shanshan Ma (M2-4) Design Manager: Zack Menegakis Presentation 10: Top-Level Layout April 17, 2006 Overall Project Objective: Design a low-power chip that navigates an aircraft to pre-determined waypoints.

  2. Status • Design Proposal • Architecture Proposal • Size Estimates / Floorplan • Schematic Design • Layout • Spice Simulations • Global

  3. Design Decision • Split FSM into two parts to fit into the top level

  4. FSM

  5. Done BB Alt comp Outputregs Done 8Hz BB Input regs Distance Calculator Spd comp Speed Calculator Angle comp FSM 240Hz 2048Hz SRAM Heading regs Input regs BBOutputregs Waypoint comparator Heading Dimensions: 405.45um * 315.36um Area: 127,862.712 um2

  6. Power Analysis

  7. Metal Density (%)

  8. Metal Density

  9. Size Estimate *No Interconnect

  10. Questions???

  11. What’s Next… Here’s what’s on our agenda for next week… • Finish Global • LVS

More Related