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This document explores the power management constraints of UICC Low Drop-Out Regulators (LDOs). It highlights the significance of quiescent current, with a threshold of less than 15 µA under specific conditions. Key factors include acceptable voltage drop during load transients and appropriate current ranges. The impact on battery lifetime is minimal, adhering to GSMA requirements. It discusses engineering compromises like output decoupling capacitors, current peaks, and nominal voltage settings essential for optimizing UICC performance, concluding that challenges are negligible when voltage levels are managed properly.
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Basic LDO Constraints • The quiescent current is related to the performances. • For usual LDO the quiescent current is less than 15 µA if: • The acceptable voltage drop during load transient is not tight (< 100 mV) • The current range is not too wide (e.g. < 100 mA)
CLF Power Management <5µA • Current consumption distribution < 10µA < 2 µA < 8 µA Idle mode: No communication on going
Engineering Compromises • Battery off mode • Require a low output decoupling capacitor < 500 nF • Require a low tank capacitor < 2.2 µF • Battery on mode • Class C* support (1.75V up to 1.95V) • Current peak up to 100 mA • Idle mode current < 25 µA (UICC LDO,…) • VCC nominal 1.88V in order to have 100 mV voltage drop margin and a low power LDO • Power off • The UICC and all CLF functions are switched off • Standby current << 5µA
Conclusion • Impact on the battery lifetime • Negligible (<1%) and far bellow the GSMA requirements (< 10%) • Technical challenge • None if the UICC VCC nominal voltage in class C* is centered around 1.85V instead 1.8V