Exploring Digital Logic through NAND and D Flip-Flop Circuits

DESCRIPTION

This experiment, led by teacher Wu Shao-Hsun with assistants Jiang Chang-Ting and Zheng Chong-Jie, focuses on digital logic circuit design using NAND gates and D flip-flops. The equipment includes two 7400 NAND ICs, one LED, one D flip-flop, and additional components for wiring. The experiment aims to construct and analyze circuits that illustrate the behavior of positive edge-triggered D flip-flops. Students will gain hands-on experience in building, testing, and understanding the dynamics of sequential logic circuits.

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Jan 30, 2026

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Exploring Digital Logic through NAND and D Flip-Flop Circuits

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Presentation Transcript

Logic Experiment 8 老師：伍紹勳助教：江長庭鄭仲傑
Equipment IC： 7400 (NAND) x 2、LED x 1
D Flip Flop
1 S’ 2 5 Q Clock 6 Q’ 3 R’ 4 D Edge-triggered Flip-flop :D-type positive edge triggered FF :