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Multiple data transfer instructions

Multiple data transfer instructions. ARM also supports multiple loads and stores: LDM/LDMIA/LDMFD : load multiple registers starting from [ base register], update base register afterwards LDM <Rn>!,<registers> LDM <Rn>,<registers> STM/STMIA/STMEA : store multiple registers starting at

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Multiple data transfer instructions

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  1. Multiple data transfer instructions ARM also supports multiple loads and stores: LDM/LDMIA/LDMFD: load multiple registers starting from [base register], update base register afterwards LDM <Rn>!,<registers> LDM <Rn>,<registers> STM/STMIA/STMEA: store multiple registers starting at [base register], update base register after

  2. Multiple data transfer instructions • General syntax: • op{cond}<address-mode> <rn>{!}, <reg-list>{^} • op : LDM, STM • Cond: an optional condition code • Address-mode: • iaIncrementaddress after each transfer • ib– Incrementaddress before each transfer. • da – Decrement address aftereach transfer • db– Decrementaddress before each transfer • fd – full descending stack • ed – emptydescending stack • fa – fullascending stack • ea – empty ascending stack.

  3. Multiple data transfer instructions • Rn is the base register containing the initial memory address for the transfer. • ! is an optional suffix. • - If ! is present, the final address is written back into Rn. • reg-list • a list of registers to be loaded or stored. • can be a comma-separated list or an rx-ry style range. • may contain any or all of r0 - r15 • the registers are always loaded in order regardless to how the registers are ordered in the list.

  4. Multiple data transfer instructions • ^ is an optional suffix and NOT use it in User mode or • System mode. • - if op is LDM and reg-list contains the pc • Current processor status register (CPSR) is restored • from the SPSR • - otherwise, data is transferred into or out of the User • mode registers instead of the current mode • registers.

  5. Multiple data transfer instructions • Example of ldmia – load, increment after • ldmia r9, {r0-r3} @ register 9 holds the • @ base address. “ia” says • @ increment the address • @ after each value has • @ been loaded from memory • This has the same effect as four separate ldr instructions, or • ldr r0, [r9] • ldr r1, [r9, #4] • ldr r2, [r9, #8] • ldr r3, [r9, #12] • Note: at the end of the ldmiainstruction, register r9 has not been changed. If you wanted to change r9, you could simply use • ldmia r9!, {r0-r3, r12}

  6. Multiple register data transfer instuctions • ldmia – Example 2 • ldmia r9, {r0-r3, r12} • Load words addressed by r9 into r0, r1, r2, r3, and r12 • Increment r9 after each load. • Example 3 • ldmia r9, {r5, r3, r0-r2, r14} • load words addressed by r9 into registers r0, r1, r2, r3, r5, and r14. • Increment r9 after each load. • ldmib, ldmda, ldmdb work similar to ldmia • Stores work in an analogous manner to load instructions

  7. Multiple register data transfer instuctions • Common usage of multiple data transfer instructions • Stack • Function calls • Context switches • Exception handlers

  8. Multiple register data transfer instuctions • Stack • When making nested subroutine calls, we need to store the current state of the processor. • The multiple data transfer instructions provide a mechanism for storing state on the runtime stack (pointed to by the stack pointer, R13 or sp) • stack addressing: • – stacks can ascend or descend memory • – stacks can be full or empty • – ARM multiple register transfers support all forms of the • stack

  9. Multiple register data transfer instuctions • Stack • Ascending stack: grows up • Descending stack: grows down • A stack pointer (sp) holds the address of the current top of the stack • Fullstack: pointing to the last valid data item pushed onto the stack • Emptystack: pointing to the vacant slot where the next data item will be placed

  10. Multiple register data transfer instuctions • Stack Processing • ARM support for all four forms of stacks • Full ascending (FA): grows up; stack pointer points to the highest address containing a valid item • Empty ascending (EA): grows up; stack pointer points to the first empty location • Full descending (FD): grows down; stack pointer points to the lowest address containing a valid data • Empty descending (ED): grows down; stack pointer points to the first empty location below the stack

  11. Stack -- Last in first out memory • Multiple store / load • STMED • LDMED Stack pointer (r13)

  12. Stack Push operationStore multiple empty descending; STMED instruction “Empty” means Stack Pointer is pointing to an empty location • SUB1 STMED r13!, {r0-r2, r14} @ push • ;work & link registers • It stores data on stack and decreases r13 New Old Old New

  13. Stack Pop operationLoadmultiple empty descending; LDMED instruction • LDMED r13!, {r0-r2, r14} @ pop work & • @link registers • It restore data on Registers and increases r13 Old New New Old

  14. Nested Subroutines • Since the return address is held in register r14, you should not call a further subroutine without first saving r14. • It is also a good software practice that a subroutine does not change any current register values (of the calling program) except when passing results back to the calling program. • This is the principle of information hiding: try to hide what the subroutine does from the calling program. • How do you achieve these two goals? Use a stack to: • Preserve r14 • Save, then retrieve, the values of registers used inside a subroutine

  15. Details of how to preserve data inside a subroutine using STACK BL SUB1 ….. SUB1 STMED r13!, {r0-r2, r14} @ push work & link registers …. @stmed=store multiple empty descending BL SUB2 @ jump to a nested subroutine … LDMED r13!, {r0-r2, r14} @ pop work & link registers MOV pc, r14 @ return to calling program New Old Old New

  16. STMED=store multiple empty descendingLDMED=Load multiple empty descending • Memory Address Descending and pointing at an empty space Old New Old New

  17. Exercise 2 New Old • If SP (r13) is 00340080H before executing STMEDr13!, {r0-r2,r14} • Where are r0,r1,r2,r14 stored, and what is r13’ after STMEDr13!, {r0-r2,r14} is executed? • What is the value of the stack point SP(r13) after LDMED r13!,{r0-r2,r14} is executed? Old New Push stack (save registers) Pop stack (restore registers)

  18. Different versions of STM (Store Multiple Memory) • They are: • STMFD • STMED • STMFA • STMEA

  19. Difference between Empty and Full (in STMED and STMFD) of Stack Push operations Empty: Store multiple empty descendingSTMED instruction STMED r13!, {r0-r2, r14} ; Full: Store multiple fulldescendingSTMFD instruction STMFD r13!, {r0-r2, r14} ; Old Old New New “Full” means Stack Pointer is pointing to a full (non-empty) location “Empty” means Stack Pointer is pointing to an empty location

  20. Difference between Ascending and Descending(in STMFA and STMFD) of Stack Push operations Ascending: Store multiple full ascending STMFA r13!, {r0-r2, r14} ; Descending Store multiple fulldescending STMFD r13!, {r0-r2, r14} ; old new new old “descending” means the address holding the registers is descending “ascending” means the address holding the registers is ascending

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