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Memory (an introduction)

An introduction to memory recall through clocked D latch circuits. This article explores voltage at D, edge-triggered circuits, writing to memory words, reading memory words, and memory writing enable techniques.

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Memory (an introduction)

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  1. Memory (an introduction) Recall the clocked D(data) latch: C i r c u i t D Q C L K Q D Q S y m b o l C Q Digital Techniques Fall 2007 André Deutz, Leiden University

  2. Aside:Edge triggered/level triggered A B D A C Time What is the voltage at D? Digital Techniques Fall 2007 André Deutz, Leiden University

  3. Edge triggered C i r c u i t D Q B Cl ock Q C D D Q Q S y m b o l C C Q Q Digital Techniques Fall 2007 André Deutz, Leiden University

  4. I2 I1 I0 Data In Word 0 Word 1 memory Word 2 D D D D D D D D D D D D D Q Q Q Q Q Q Q Q Q Q Q Q Q Word 3 C C C C C C C C C C C C C Q Q Q Q Q Q Q Q Q Q Q Q Q Writing to a memory word Digital Techniques Fall 2007 André Deutz, Leiden University

  5. I2 I1 I0 Data In Word 0 Word 1 memory Word 2 D D D D D D D D D D D D D Q Q Q Q Q Q Q Q Q Q Q Q Q Word 3 C C C C C C C C C C C C C Q Q Q Q Q Q Q Q Q Q Q Q Q Writing to a memory word Digital Techniques Fall 2007 André Deutz, Leiden University

  6. I2 I1 I0 Data In Word 0 a1 Word 1 a0 2 to 4 decoder memory Word 2 D D D D D D D D D D D D D Q Q Q Q Q Q Q Q Q Q Q Q Q Word 3 C C C C C C C C C C C C C Q Q Q Q Q Q Q Q Q Q Q Q Q Writing to a memory word Digital Techniques Fall 2007 André Deutz, Leiden University

  7. I2 I1 I0 Data In Word 0 a1 Word 1 a0 2 to 4 decoder memory Word 2 D D D D D D D D D D D D D Q Q Q Q Q Q Q Q Q Q Q Q Q Word 3 C C C C C C C C C C C C C Q Q Q Q Q Q Q Q Q Q Q Q Q Writing to a memory word enable Digital Techniques Fall 2007 André Deutz, Leiden University

  8. I2 I1 I0 Data In Word 0 a1 a0 Word 1 2 to 4 decoder Word 2 D D D D D D D D D D D D D Q Q Q Q Q Q Q Q Q Q Q Q Q Word 3 C C C C C C C C C C C C C Q Q Q Q Q Q Q Q Q Q Q Q Q memory Writing to a memory word enable Digital Techniques Fall 2007 André Deutz, Leiden University

  9. I2 I1 I0 Data In Word 0 a1 Word 1 a0 2 to 4 decoder Word 2 D D D D D D D D D D D D D Q Q Q Q Q Q Q Q Q Q Q Q Q Word 3 C C C C C C C C C C C C C Q Q Q Q Q Q Q Q Q Q Q Q Q memory Writing to a memory word enable Digital Techniques Fall 2007 André Deutz, Leiden University

  10. I2 I1 I0 Data In Word 0 a1 Word 1 a0 2 to 4 decoder Word 2 D D D D D D D D D D D D D Q Q Q Q Q Q Q Q Q Q Q Q Q Word 3 C C C C C C C C C C C C C Q Q Q Q Q Q Q Q Q Q Q Q Q memory Reading a mem word

  11. I2 I1 I0 Data In Word 0 a1 Word 1 a0 2 to 4 decoder Word 2 D D D D D D D D D D D D D Q Q Q Q Q Q Q Q Q Q Q Q Q Word 3 C C C C C C C C C C C C C Q Q Q Q Q Q Q Q Q Q Q Q Q memory enable

  12. I2 I1 I0 Data In Word 0 a1 Word 1 a0 2 to 4 decoder Word 2 D D D D D D D D D D D D D Q Q Q Q Q Q Q Q Q Q Q Q Q Word 3 C C C C C C C C C C C C C Q Q Q Q Q Q Q Q Q Q Q Q Q memory enable

  13. I2 I1 I0 Data In Word 0 a1 Word 1 a0 2 to 4 decoder Word 2 D D D D D D D D D D D D D Q Q Q Q Q Q Q Q Q Q Q Q Q Word 3 C C C C C C C C C C C C C Q Q Q Q Q Q Q Q Q Q Q Q Q memory enable

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