1 / 82

Mauna Kea Infrared NICI Electronics

Mauna Kea Infrared NICI Electronics. Electronics Presentation Outline. Functional and Performance Requirements Top Down Overview of Electronics Cabinet Location & Layout Weight and Power Cabling Document Tree Grounding Plan Major Subsystem Description Temperature and Monitoring 

toshi
Télécharger la présentation

Mauna Kea Infrared NICI Electronics

An Image/Link below is provided (as is) to download presentation Download Policy: Content on the Website is provided to you AS IS for your information and personal use and may not be sold / licensed / shared on other websites without getting consent from its author. Content is provided to you AS IS for your information and personal use only. Download presentation by click this link. While downloading, if for some reason you are not able to download a presentation, the publisher may have deleted the file from their server. During download, if you can't get a presentation, the file might be deleted by the publisher.

E N D

Presentation Transcript


  1. Mauna Kea Infrared NICI Electronics

  2. Electronics Presentation Outline • Functional and Performance Requirements • Top Down Overview of Electronics • Cabinet Location & Layout • Weight and Power • Cabling • Document Tree • Grounding Plan • Major Subsystem Description • Temperature and Monitoring  • Mechanism Control • Adaptive Optics • Dual Array Controller • Documentation Example • Redstar3 Design, Development and Status

  3. Functional Requirements 1 • Must operate two 4 quadrant Aladdin type III style arrays Reference Document: SDN 3003 NICI Dual Array Controller  • Must allow synchronization of readouts of the two arrays to 1 millisecond. ‘Quick Answer’: The Clocking FPGA circuitry located on the FCRYO2 board will start exposures when in an ARM state and after receiving an optocoupled TTL level TRIGGER signal. Clocking will be synchronized to within 21-140nsec. Reference Document: FCRYO2 700-2##-## 

  4. Functional Requirements 2 • Single subarray mode minimum size 8x16 placed anywhere in the array and reflected to all four quadrants. • Global reset • Single sampled readout mode • Double correlated sampled readout mode • Multiple NDR noise reduction sampling mode ‘Quick Answer’: The Clocking FPGA circuitry located on the FCRYO2 board allows for flexible clocking encompassing these requirements. Reference Document: FCRYO2 700-2##-##

  5. Functional Requirements 3 • Connect to Gemini through a Socket for remote control • State set and state read commands • Populate the FITS header and ship the data to the DHS • Must operate in a standalone mode or under Gemini control in a remote mode • Must provide an image display in standalone mode • Must provide local storage for standalone mode • Must have macro capability in stand alone mode Reference Document: SDN 3003 NICI Dual Array Controller and Software Documentation

  6. Functional Requirements 4 • Must time stamp frames using Gemini supplied time board* ‘Quick Answer’: NICI will use a MKIR supplied time board located in the Pixel Servers Reference Document: SDN 3003 NICI Dual Array Controller

  7. Performance Requirements 1 • Read noise - the controller should not increase the device noise by more than 10% ‘Quick Answer’: ‘The gain is fixed at X5 and the bandwidth is limited to ~2.9Mhz with resulting calculated noise (with a 1K souce impedance) is equal to 53.2uV. For the +/-2.5V input range of the ADCs’ one bit (LSB) is equal to 76uV so the preamplifier contributes less than 1 LSB.’ Reference Document: PREAMP8 700-158-01 ‘Quick Answer’: The previous generation array controllers using the same analog and ADC circuitry has been able to achieve the read noise requirement on 6 different Aladdin arrays on 3 different telescopes (SUBARU, IRTF, NRL/NO Flagstaff).

  8. Performance Requirements 2 • A/D resolution – adequate to get two bits on the noise ‘Quick Answer’: The gain is fixed at X5. From experience, the e/ADU ratio averages ~10e/ADU at this setting, leaving ~ 4bits of resolution on the noise from single Fowler pair readout of the Aladdin III. Reference Document: PREAMP8 700-158-01 • Full frame coadd rate - 2 Hz required (10 Hz goal) • Full frame to disk rate – 2 Hz required (10 Hz goal) ‘Quick Answer’: As of 3/15/2002, testing has that shown data processing and storage rates have achieved the 2 Hz requirement and 10Hz goal for both coaddition and storage.

  9. Performance Requirements 3 • Display frame rate stand alone mode – .5 sec to display frame desired. ‘Quick Answer’: As of 3/15/2002, no testing has been performed.

  10. Cabinet Location and Layout

  11. Instrument Control, Rack#1 Camera, thermal, and motor control electronics. Major interfaces are made to the cryostat and cryostat mounted motor systems. Array Power Supply Thermal Control Cryostat Thermal Monitor ‘Cryomount’ Electronics Instrument Workstation Pixel Server 1 Pixel Server 2 Motor Control Utility Box1 Motors and Interface Ethernet Power Control1 Ethernet Switch1

  12. Rack#1 Layout • Combined Front and Rear Mounting will need to be used

  13. Rack#1 Power Estimate

  14. Rack#1 Weight Estimate • Does not include Rack weight

  15. HERMETIC CONNECTORS INSTRUMENT CONTROL RACK#1 Rack#1 to Cryostat Cables

  16. Rack#1 Cable Types

  17. Rack#1 Cable Description

  18. AO Control, Rack#2 The functions of APD power supply , APD output counting, membrane and deformable mirror drive are housed in major subsystems in this rack. Major interfaces are made to the AO assembly and APD chassis.. AO Assembly AO APD Chassis APD Power Supply1 APD Power Supply2 AO Utility Box Ethernet Switch2 Ethernet Power Control2 AO Computer APD Control Chassis1 APD Control Chassis2

  19. Rack#2 Layout • Combined Front and Rear Mounting will need to be used Will need to change standard chassis

  20. Rack#2 Power Estimate

  21. Rack#2 Weight Estimate • Does not include Rack weight

  22. Document Tree

  23. Grounding Plan/Approach • 29+ Potential Ground Sources

  24. Grounding Isolation Levels Level1 Backplanes Level2 Fiber Level3 Separate Power Feeds Level4 Isolation from CCC Level5 Source Identification

  25. Temperature Control Subsystem • 2 Lakeshore Model 331s for Cryogenic Temeparture Control, +0.6mK control with DT-470 Si sensor • Model 218 for Monitoring

  26. Temperature Control Diagram Lakeshore 331/2 From Terminal RS232 Server Sensor 1 Front Panel IIndicators Array Mount #1 Sensor 3003 heater Heater Loop #1 filter Heater Lakesho re 331/2 RS232 Sensor 1 Front Panel Array Mount #2 IIndicators Sensor 3003 heater Heater Loop #1 Heater filter

  27. Temperature Monitor Diagram Lakeshore 218 From Terminal Server RS232 Front Panel Indicators Sensor 1 Sensor 3 Cold Structure CCC 1st stage Sensor Sensor 4 Cold Structure CCC 2nd stage Sensor Sensor 5 APD Assy Cold Structure Sensor Sensor 6 Radiation Shield Sensor Sensor 7 Radiation Shield CCC 1st stage Sensor APD heatsink Sensor

  28. CRYOSTAT JBOX Hall Effect Sensors Rack#1 Instrument Control Motor Control Box Pupil Mask Motor Dichroic Motor CHL1 Filter Motor CHl2 Filter Motor Pupil Imager Motor Focal Plane Mask Motor Spider Mask Motor Mechanism Control Subsystem • 7 Cryostat Mechanisms • Magnetic Hall Effect Sensors for position sensing

  29. Motor Control Box Hall Effect Sensor Digital Comparator Signals Sixnet Digital Input Module Ethernet Gateway Local Ethernet Sixnet Analog Input Module Amplified Hall Effect Sensor Signals 48VDC Power Supply#1 48VDC Power Supply#2 48VDC Power Supply#3 To Animatics Motors DIGI Digiport16 RS232 Server Motor Control box • COTS Sixnet Digital Analog Modules • Power Supplies for Animatics Motors

  30. Sixnet Ethernet Based I/O • DIN railmount Modules • Ethernet Gateway to ST-BUS

  31. Animatics Servo Motors • NEMA size 34 Servo Motors • RS232 and Power into built in Controller, Encoder and Driver

  32. Junction Box + Preamplifier • Animatics Power and RS232 Fanout • Hall Effect Sensor Preamplifier Current LED CH1I+ Instrumentation Positive V TTL out source Amplifier Comparator G=100 CH1V+ Analog out CH1V - LED Negative V Hall Sensor TTL out Comparator CH1I - X 8

  33. Major AO Subsystems • Wavefront Sensor Assy = Deformable piezo mirror, opto-mechanical subsystems + lenselette fiber feed • APD Mount Assy = Fiber in/Counts out, EG&G Avalanche Photodiodes, cooled chassis • AO Crate = APD counters + mirror high voltage amplifiers • AOPC = AO calculation CPU (Real Time Linux PC) • Motion Control Box = opto-mechanisms in WFS • Vendor support electronics = tiptilt drive, X,Y,Z stage

  34. Wavefront Sensor Assy Electronics • Membrane Mirror: speaker driver • Lenselette: 85 SC terminated fiber cables • XYZ stage: Ball Aerospace • Filter Wheel: vendor supplied

  35. APD mount • Cooled housing for 85 EG&G Avalanche Photo-Diode modules • Inputs : 85 fiber cables from lenselette array, power for APDs and fans. • Outputs: 85 APD outputs, temp sensors, thermal cutoff switches. • Power Dissipation ~240W nominal

  36. AO Crate • 2X 7U Eurocard Chassis (not a VME computer system) • Control boards • Power supplies • Amplifier for membrane mirror

  37. AO Crate Boards • “remote” Multifunction board • Fiber interface • Sinephase Generator = system clock • Backplane bus interface • 24 Channel Counter boards x 2 • Inputs: APD signals, backplane bus • Outputs: backplane bus • 12 Channel High Voltage Amps x 3 • Inputs: backplane bus • Outputs: HV drive to Deformable Mirror

  38. AO Crate I/O • I/O • Inputs • 85 total Coax cables from APDs • Fiber from PC MFB • AC power X 2 • Outputs • HV output cable to DM • 3 channels of analog drive to PI piezo amplifiers • Output cable to membrane mirror

  39. AO Crate Power Supplies • Power supplies • +/- 500V Ultravolt High Voltage Power Supply. • Sola +24V supply for Ultravolt • Amplifier for membrane mirror • Basic audio car amp

  40. AOPC • Real Time Linux PC • Read in APD counts/phase • National Instruments DIO fast parallel PCI interface board • “local” Multifunction board

  41. Motion Control Box Form factor TBD • Ball Aerospace control electronics • Filter Wheel control • Physik Instrumente Tiptilt piezo amplifiers (may be separate assy) • Other mechanisms

  42. Local Display Red Array Blue Array Instrument Workstation LAN Interface LAN Switch LAN/RS232 Fiber LAN Temp Controller Clocker Pixel Server Workstation SL240 PCI Fiber Interface LAN Interface CLK/BIAS Custom Electronics Preamps ADCs SL240 CMC Power Supply Clocker Pixel Server Workstation SL240 PCI Fiber Interface LAN Interface CLK/BIAS CustomElectronics Preamps ADCs SL240 CMC Dual Array Controller Subsystem

  43. Internal Cryostat Electronics Array Mount Array Mount Cryostat Cabling Cryostat Cabling Motors Hall Sensors Cryostat Mounted ReadoutElectronics Hall Sensor Preamp AO High Voltage Drivers Power Supply Thermal Control REDSTAR3 Affected Areas AO APD Electronics Motor Control EPICS Control Instrument Control VME64 System Adaptive Optics LINUX Controller Original Proposed Redstar2 System To DHS To DHS

  44. Array Mount & Cryostat Cabling 2.2” opening or larger subplate RADIATION SHIELD CRYOSTAT VACUUM WALL COLD STRUCTURE 1024X1024 InSb ARRAY 2.875” Connector Mounting Block 2.00” Connector Board 35K ARRAY ENCLOSURE Manganin Ribbon Cable FANOUT BOARD MS3440H-24-61P 61pin Hermetic Connector DIN41612R 64pin connector CONFIGURATION BOARD Gold header pins epoxied to cold structure Epoxy seal

  45. Custom = ‘Cryomount’ Subassemblies

  46. Redstar2 8/16 Channel Clock/Bias Driver Technical Specifications 700-111-01 CLKBIAS • 16 individual 12 bit DACs (AD767) with buffered outputs • Bias 30ppm/C gain drift • Bias outputs 150mA max output current • +/- 10 Volt output range • Analog switch (HI201HS) based clock outputs • 30nsec typ. 50nsec max switching times • 6 layer PCB Power Requirements • +5V 209mA Typ. • +15V 483mA Typ. • -15V 483mA Typ. Mechanical Specifications • Eurocard 6U (160mm x 233.35mm) Form Factor • P1 96 pin DIN Connector,P2 DIN 41612, 96 Pin Connector • 6 Layer PCB Construction with Internal Gnd & Power Layers

  47. Redstar2 8Channel Preamp Technical Specifications 700-158-01 PREAMP8 • 8 Independent Channels • Classic 3 Opamp Instrumentation Amp Channels • Fixed Gain (X 5 for InSb 1024x1024) • Typical Noise < 39nV/Hz -2 @ X5 gain,1K source resistance, offset • Typical Bandwidth 3MHz (Raytheon 152 mux) • On board 12 bit DACs, Offset&Vref • 10K Input Load Resistor or Current Source Power Requirements • +5V 120mA Typ. • +15V 480mA Typ. • -15V 480mA Typ. Mechancial Specifications • 'Eurocard' 6U (160mm x 233.35mm) Form Factor • P1 64 pin DIN Connector,P2 DIN 41612, 96 Pin Connector • 6 Layer PCB Construction with Internal Gnd & Power Layers

  48. Redstar2 8Channel ADC 16 bit 2Mhz/channel Technical Specifications 700-155-01 ADC8 · 8 Independent Channels · 8 Analogic ADC4322s · Altera MAX7128 CPLD · Input range settings (+/-2.5V,+/-5.0V,0-10V) · 6 layer PCB Power Requirements · +5V 696mA Typ. · +15V 568mA Typ. · -15V 488mA Typ. Mechanical Specifications · Eurocard 6U (160mm x 233.35mm) Form Factor · P1 96 pin DIN Connector,P2 DIN 41612, 96 Pin Connector · 6 Layer PCB Construction with Internal Gnd & Power Layers

  49. The Redstar3 Project Because of the desire to upgrade the controller MKIR bid on and won the controller project for NSO Concurrently at UH the IRTF proposed to NSF to upgrade NSFCAM with a NGST test array using long wavelength cut-off HgCdTe MKIR and the Advanced Technology Center at the Institute for Astronomy have agreed to team on the controller development Under this agreement two Redstar3 controllers will be developed

  50. Redstar3 Controller Project Requirements Key elements of the NSO requirements Aladdin 3 array Many coadd buffers Fast frame rates Stream to disk mode Subarray capability Hardware triggered exposures Real-time display Key Elements of the NSFCAM upgrade controller requirements 1024x1024 Rockwell 1R detector(1-5 microns) Readout fast enough for broadband thermal observations Speckle mode Multiple subarrays Occultation mode

More Related