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A radiation-tolerant LDO voltage regulator for HEP applications

This paper presents the development and performance evaluation of a compact LDO voltage regulator designed to meet the radiation tolerance requirements of high-energy physics applications at CERN. The regulator, named "CRTREG1," boasts excellent measured performance, radiation performance, and protection features. It offers low dropout voltage, good PSRR, transient response, and high tolerance to ionizing radiation up to 20 Mrad. This novel regulator addresses the power distribution challenges in LHC experiments efficiently and cost-effectively.

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A radiation-tolerant LDO voltage regulator for HEP applications

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  1. A radiation-tolerant LDO voltage regulator for HEP applications F.Faccio, P.Moreira, A.Marchioro, S.Velitchko CERN

  2. Outline • Motivation • Specifications • Implementation • Measured performance • Radiation performance • Conclusion F.Faccio – CERN/MIC

  3. Motivation • Power distribution in LHC experiments is a real challenge • Need for voltage regulation close to the electronics to be powered: linear regulators are often used • To limit (useless) power dissipation, LDO regulators are desired, having drop-out voltages as low as 100-150mV • Rad-hard regulators with these characteristics are prohibitively expensive • A rad-hard LDO regulator with limited current capability (300mA) can be developed as an ASIC using “our” quarter micron CMOS process at low cost! F.Faccio – CERN/MIC

  4. Specifications F.Faccio – CERN/MIC

  5. Implementation (1) • Regulator named “CRTREG1”, as part of the CERN Radiation Tolerant (CRT) family of components • External compensation solution chosen: the dominant pole is the output pole • This imposes value (min. 1, suggested 6.6mF) and characteristics (low ESR of the order of 20mOhm) of the output compensation capacitance, but allows for larger regulator bandwidth, hence good PSRR and transient response • Integrated in 0.25mm CMOS technology using radiation-tolerant layout techniques F.Faccio – CERN/MIC

  6. Vin Vout Switches for disable R1 Over-I monitor Over-V monitor Error amplifier off R2 Over-T monitor Bandgap Disable in Gnd Disable flag Implementation (2) Functional block diagram F.Faccio – CERN/MIC

  7. Implementation (3) • Chip size: 2x2mm • Multiple pads for input and output current • Mounted on a very compact plastic package (4.9 x 6.1 x 1.6 mm), 16L-EPP-SSOP F.Faccio – CERN/MIC

  8. Measured performance • Samples packaged and mounted on test boards, with different output capacitors (to test transient response) • 10 samples measured • Quiescent current: 800mA at Vin=2.65V; 950mA at Vin=3.3V • Output noise (Cout=6.6mF), over full bandwidth: • 170mV rms for I=0 • 530mV rms for I=250mA CRTREG1 Cout F.Faccio – CERN/MIC

  9. Measured performance: line and load regulation • Measurements on 10 samples • Dropout at 300mA output current: average 160mV, maximum 235mV • Line regulation above Vin=2.8V, for I=300mA: average 1.7mV (0.09%/V), maximum 2.5mV (0.14%/V) • Load regulation from I=0 to I=300mA, for Vin=2.8V: average 14.2mV (0.0018%/mA), maximum 15.5mV (0.002%/mA) Load regulation Line regulation F.Faccio – CERN/MIC

  10. Measured performance: protections • Over-Temperature OK: when regulator draws more than 1.8A at Vin=3.3V, it is disabled (test in temperature done by disabling Over-current protection and heating the regulator with large currents) • Over-Voltage OK: when Vin is above about 3.55 V, the regulator is disabled • Over-Current works but sets-in at current depending on Vin (up to 800mA). Origin understood and easy to correct. F.Faccio – CERN/MIC

  11. Output voltage 50mV/div I=250mA, Cout=6.6mF Vin=2.8V, Cout=6.6mF Output voltage 100mV/div 250mA to 0 Input voltage 200mV/div 0 to 250mA Time 10mS/div Time 10mS/div Measured performance: line and load transients • Load transients: • Transient from I=0 to 250mA • At Vin=2.65, 2.8 and 3.3V • For Cout =1mF, 3.3mF and 6.6mF • Line transients: • Transient of 500mV Vin • At 100mA and 250mA • For Cout =3.3mF and 6.6mF F.Faccio – CERN/MIC

  12. Measured performance: PSRR • Power Supply Rejection measured injecting sine wave signal at different frequency at the input (50-100mV peak-peak) • Measurements for I=0 and 250mA, and for Cout=3.3mF and 6.6mF Able to filter effectively at full load up to 100kHz (similar regulators cut at 1kHz typically) Vin=3V Cout=6.6mF F.Faccio – CERN/MIC

  13. Radiation performance (1) • Irradiation at IONISOS (Dagneux, F) with a 60Co source; dose rate about 200 krad/h • Regulators under bias during irradiation: Vin=3V, I=0 (3 samples) and 250mA (3 samples) • TID levels achieved: • 1.7 Mrad – 1 sample • 7.1 Mrad – 1 sample • 12.4 Mrad – 2 samples • 20 Mrad – 2 samples • Measured performed for all samples at the end of irradiation, hence after annealing for 57-114 hours at room T and under bias F.Faccio – CERN/MIC

  14. Line regulation before (dots) and after 20Mrad (lines) Load regulation before (dots) and after 20Mrad (lines) Vin=3V and 3.5V I=0 to 300mA, step 50mA Vin=2.7V Vin=2.65V Vin=2.6V Radiation performance (2) • Main effect: output voltage shifts with TID (max 110mV after 20Mrad). This is due to shift in bandgap voltage reference. • Line and load regulation do not change significantly F.Faccio – CERN/MIC

  15. Radiation performance summary • Output voltage shifts with TID • Over-voltage detection threshold shifts with TID • TID effects not dependent on load condition • Regulator tolerant to TID up to 20Mrad, probably more F.Faccio – CERN/MIC

  16. Conclusion • CRTREG1, a compact LDO radiation-tolerant voltage regulator has been developed • Its performance is well comparable to commercial LDO regulators (dropout, line and load regulation, transient response, PSSR) • First prototype fully working, easy correction to be implemented for better stability of over-current protection • Radiation tolerance up to 20Mrad from 60Co source has been demonstrated • The regulator is ready for production F.Faccio – CERN/MIC

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