1 / 30

Departement Elektriese, Elektroniese & Rekenaar-Ingenieurswese

LC-Ladder and Capacitive Shunt-Shunt Feedback LNA Modelling for Wideband HBT Receivers Marnus Weststrate Supervisor: Prof Saurabh Sinha Microelectronics & Electronics Group University of Pretoria, South Africa Wednesday, 15 October 2014.

velika
Télécharger la présentation

Departement Elektriese, Elektroniese & Rekenaar-Ingenieurswese

An Image/Link below is provided (as is) to download presentation Download Policy: Content on the Website is provided to you AS IS for your information and personal use and may not be sold / licensed / shared on other websites without getting consent from its author. Content is provided to you AS IS for your information and personal use only. Download presentation by click this link. While downloading, if for some reason you are not able to download a presentation, the publisher may have deleted the file from their server. During download, if you can't get a presentation, the file might be deleted by the publisher.

E N D

Presentation Transcript

  1. LC-Ladder and Capacitive Shunt-Shunt Feedback LNA Modelling for Wideband HBT Receivers Marnus Weststrate Supervisor: Prof Saurabh Sinha Microelectronics & Electronics GroupUniversity of Pretoria, South Africa Wednesday, 15 October 2014 Departement Elektriese, Elektroniese & Rekenaar-Ingenieurswese Department of Electrical, Electronic & Computer Engineering Kgoro ya Merero ya Mohlagase, Elektroniki & Bointšinere bja Khomphutha

  2. Agenda • Background to the research • Mathematical modelling • Input matching • Noise figure & its optimization • Gain • Design equations • Simulated results • Measured results Departement Elektriese, Elektroniese & Rekenaar-Ingenieurswese Department of Electrical, Electronic & Computer Engineering Kgoro ya Merero ya Mohlagase, Elektroniki & Bointšinere bja Khomphutha

  3. Low Noise Amplifiers

  4. SiGe processes and LNA specs • IBM 8HP process • 0.13 µm • fT = 200 GHz • Simulated • IBM 7WL process • 0.18 µm • fT = 60 GHz • Prototyped

  5. Current Matching Techniques Resistive termination 1/gm termination Resistive feedback Inductive degeneration Capacitive shunt-shuntfeedback LC-ladder and inductive degeneration

  6. LC-ladder & Capacitive Feedback Configuration

  7. Wideband Input Matching

  8. Noise Figure Derivation •

  9. Noise Figure Derivation ••

  10. Noise Figure Derivation •••

  11. Noise Source Contributions

  12. Noise Figure Optimization L2↓ L1↑ Zs↑ → L1↑ C1↓ CF↓ ↔ C2↓ gm↑ → Ic↑ rb↓ → le↑

  13. Noise Source Contributions After Optimization

  14. Gain Derivation IMN: Stage 1: Stage 2:

  15. Increasing the Gain L2↓ L2↓ Zs↑ → L1↑ C1↓ CF↓ ↔ C2↓ AV1↑ → CF↓ nA2↓ → gm↑ → nVce↓

  16. Design Equations

  17. S-parameter Results

  18. Noise Figure Results

  19. Final LNA specs 8HP process 7WL process (prototyped)

  20. LNA Layout

  21. Chip Layout 4 mm

  22. Packaging 10 mm 64 pin QFN package

  23. Expected prototype results

  24. Test PCB 15 cm

  25. Measured results Calibration path

  26. Measured results Gain de-embedding

  27. Measured results Input return loss

  28. Measured results Compared to simulations P1dB = -22 dBm Varies between -24 dBm and -21 dBm

  29. Conclusion • LC-ladder and capacitive feedback topology is feasible for very wideband applications • Mathematical model describes the performance and leads to design equations • Simulations support the accuracy of the model • Initial measured results shows some promise

  30. Thank you Acknowledgement The authors would like to thank ARMSCOR, the Armaments Corporation of South Africa Ltd, (Act 51 of 2003) for sponsoring this study. DPSS and the CSIR as well as Grintek Ewation are thanked for availing their laboratories for the measurements of the prototyped devices. Marnus Weststrate Carl & Emily Fuchs Institute for Microelectronics Dept.: Electrical, Electronic & Computer Eng. University of Pretoria Cnr. Lynnwood and University Rd. Pretoria 0002 South Africa E-mail: marnusw@ieee.org

More Related