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Design for Printability From Device to Circuit for Flexible Electronics

Design for Printability From Device to Circuit for Flexible Electronics

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Design for Printability From Device to Circuit for Flexible Electronics

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  1. Design for PrintabilityFrom Device to CircuitforFlexible Electronics Tsung-Ching (Jim) Huang Tim Cheng February 10th 2007

  2. Outline • Introduction • Motivation – Why design with flexible electronics • Limitation – What difference from Si MOFET circuit design • A-Si:H TFT • Organic TFT • Robust Circuit Design for Flexible Electronics • A-Si:H TFT • Robust building blocks • Organic TFT • Cell library design • Printable circuit layout

  3. U. Tokyo Poly IC ASU Plastic Logic Polymer Vision Why Design with Flexible Electronics

  4. What Differences from Si MOFET Circuit Design

  5. Outline • Introduction • Motivation – Why design with flexible electronics • Limitation – What difference from Si MOFET circuit design • A-Si:H TFT • Organic TFT • Robust Circuit Design for Flexible Electronics • A-Si:H TFT • Robust building blocks • Organic TFT • Cell library design • Printable circuit layout

  6. Pseudo-ComplementaryA-Si:H TFT Inverter

  7. A-Si:H TFT Inverter Transfer Function

  8. Output Reponses ofN-TFT Inverter Chain • Signal strength after propagation will diminish due to insufficient noise margin • Insufficient for circuit design with a certain degree of complexity

  9. Output Reponses ofC-TFT Inverter Chain • Signal strength after propagation remains at the same level as input signal • Sufficient for circuit design of higher complexity

  10. Immunity to Threshold Voltage Variation

  11. Compensation to Threshold Voltage Variation

  12. Outline • Introduction • Motivation – Why design with flexible electronics • Limitation – What difference from Si MOFET circuit design • A-Si:H TFT • Organic TFT • Robust Circuit Design for Flexible Electronics • A-Si:H TFT • Robust building blocks • Organic TFT • Cell library design • Printable circuit layout

  13. Published OTFT Model ~ pF ~ pF ~ kΩ ~ kΩ Top Gate Bottom Contact Ref: M. Fadlallah et al, Plastic Logic, J. Applied Physics 2006

  14. Printed Passive Component Physical dimension for high-impedance resistance: 1KΩ 2mm x 1mm (190ºC, 1-layer) • Ink-jetted resistance normally can have much higher value than standard clean-room process • High impedance resistance can be beneficial in implementing pseudo-complementary design Resistance 50 μm drop size Capacitance Ref: D. Radinger et al, J. Electron Device ‘04

  15. Pseudo-ComplementaryOTFT Inverter Ratio-less Logic • PMOS together with necessary series resistance is used for OTFT equivalent model

  16. Inverter Layout 32 Units 46 Units 1 Unit = 50 μm

  17. Output Response toThreshold Voltage Variation • PC-OTFT exhibits robustness again VTH variation due to electrical or chemical degradation

  18. Output Response of Inverter Chain • Signal propagation will not diminish in PC-OTFT inverter design because of ratio-less design • After 10-stage signal propagation, ordinary OTFT inverter can not generate the same signal strength

  19. 2-Input NAND Layout 79 Units 85 Units

  20. 3-Input NAND Layout 90 Units 115 Units

  21. 2-Input NOR Layout 79 Units 61 Units

  22. PC-OTFTD Flip-Flop Output Response • D-FF composed of PC-OTFT NAND gates exhibits good noise-margin in output response

  23. 2-Bit ROM Layout • Ex1. • Input [ 0 1 0 0 ] • Output [ 0 1 0 1] • Ex2. • Input [0 0 1 0] • Output [0 0 1 0] 79 Units 89 Units

  24. Summary • Flexible electronics technology is now emerging and more commercial applications will become available • Low-cost, bendable, thin-film, and light-weight properties are highly desirable in consumer electronics • Circuit reliability and lifetime remain to be the biggest challenges to make wide use and market penetration • Novel circuit building blocks and printable layout are demonstrated to extend circuit lifetime • Significant innovations in material/device/design/testing area are still required

  25. Q & A Thank you for your attention !!