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Physical Limits of Computing Dr. Mike Frank CIS 6930, Sec. #3753X Spring 2002

Physical Limits of Computing Dr. Mike Frank CIS 6930, Sec. #3753X Spring 2002. Lecture #31 Reversible Processor Architectures Wed., Mar. 27. Administrivia & Overview. Don’t forget to keep up with homework! We are  10 out of 14 weeks into the course.

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Physical Limits of Computing Dr. Mike Frank CIS 6930, Sec. #3753X Spring 2002

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  1. Physical Limits of ComputingDr. Mike Frank CIS 6930, Sec. #3753XSpring 2002 Lecture #31Reversible Processor ArchitecturesWed., Mar. 27

  2. Administrivia & Overview • Don’t forget to keep up with homework! • We are 10 out of 14 weeks into the course. • You should have earned ~71 points by now. • Course outline: • Part I&II, Background, Fundamental Limits - done • Part III, Future of Semiconductor Technology - done • Part IV, Potential Future Computing Technologies - done • Part V, Classical Reversible Computing • Fri. 3/22: RevComp theory II: Emulating Irreversible Machines RevComp theory II: Bounds on Space-Time Overheads • Mon. 3/25: RevComp scaling analysis I: Cost, energy, area-time. • Wed. 3/27: RevComp scaling analysis II: Spacetime and time. • Fri. 3/29: Reversible processor architectures. • Mon. 4/1: Reversible programming languages. • Wed. 4/3: Reversible algorithms. • Part VI, Quantum Computing - starts Fri. 4/5 • Part VII, Cosmological Limits, Wrap-Up

  3. Why reversible architectures? • What about automatic emulation algorithms? • E.g.: Ben73, Ben89, LMT, Frank02. • Transform an irreversible alg. to an equiv. rev’ble one. • But, these do not yield the most cost-efficient reversible algorithms for all problems! • E.g., log(RE(i./r)/Ron/off) may be only 0.4 rather than 0.5. • Finding the best reversible algorithm requires a creative algorithm discovery process! • An optimally cost-efficient general-purpose architecture must allow the programmer to specify a custom reversible algorithm that is specific to his problem.

  4. Reversibility Affects All Levels • As Ron/off increases & cost of device manuf. declines (while the cost of energy stays high), • Maximizing overall cost-efficiency requires an increasingly large fraction of all bit-ops be done adiabatically. • Maximizing the efficiency of the resulting algorithms, in turn, requires reversibility in: • Logic design • Functional units • Instruction set architectures • Programming languages • High-level algorithms (unless a perfect emulator is found) Increasing requirementfor degree of reversibility Pro-gram-mingmodel

  5. All Known Reversible Architectures • Ed Barton (MIT class project, 1978) • Conservative logic, w. garbage stack • Andrew Ressler (MIT bachelor’s thesis, 1979; MIT master’s thesis, 1981) • Like Barton’s, but more detailed. Paired branches. • Henry Baker (1992) • Reversible pointer automaton machine instructions. • J. Storrs “JoSH” Hall (1994) • Retractile-cascade-based PDP-10-like architecture. • Carlin Vieri (MIT master’s thesis, 1995) • Early Pendulum ISA, irrev. impl., full VHDL detail. • Frank & Rixner (MIT class project, 1996) • Tick: VLSI schematics & layout of Pendulum subset, w. paired branches • Frank & Love (MIT class project, 1996) • FlatTop: Adiabatic VLSI impl. of programmable reversible gate array • Vieri (MIT Ph.D. thesis, 1999) • Fully adiabatic VLSI implementation of Pendulum w. paired branches

  6. Reversible Programmable Gate-Array Architectures

  7. (as of May ‘99)

  8. Photo of packaged FlatTop chip

  9. A Bouncing BBMCA “Ball”

  10. A BBMCA Fredkin Gate

  11. Reversible von Neumann Architectures

  12. Reversible Architecture Issues • Instruction-Set Architecture (ISA) Issues: • How to define irrev. ops (AND, etc.) reversibly? • How to do jumps/branches reversibly? • What kind of memory interface to have? • What about I/O? • How to permit efficient reversible algorithms? • Should the hardware guarantee reversibility? • Microarchitectural issues: • Register file interface • Reversible ALU operations • Shared buses • Program counter control

  13. The Trivial Cases • Many typical instructions already reversible: • NOT a • Set register a to its bitwise logical complement, a := ~a • NEG a • Set a to its two’s complement negation a := -a or a := ~a + 1 • INC a • Increment a by 1 (modulo 2). • ADD ab • Add register b into register a (a := (a + b) mod 2) • XOR ab • Exclusive-or b into a (a := a b) • ROL ab • Rotate bits in register a left by # positions given by b.

  14. The Nontrivial Cases • Other common instructions are not reversible… • CLR a • Clear register a to 0. • LD ab • Load register a from addr. pointed to by b. • LDI a 3 • Load immediate value 3 into register a. • AND ab • Set a to the bitwise AND of a and b • JMP a • Jump to the instruction pointed to by a. • SLL ab • Shift the bits in a left by b bits, filling with 0’s on right.

  15. Irreversible Data Operations • How to do expanding ops reversibly? • E.g., AND ab - Prior value of a is lost. • Approach #1: “Garbage Stack” approach. • Based on Landauer’s embedding. • Push all data that would otherwise be destroyed onto a special “garbage” stack hidden from pgmr. • Can unwind computation when finished to recover stack space. (Lecerf ‘63/Bennett ‘73 approach) • Problems: Large garbage stack memory needed. • Limits computation length. • Leaves programmer no opportunity to choose a more efficient reversible algorithm!

  16. Illustrating Garbage Stack • Let “” mean reversible move, “” mean reversible copy, “” a reversible uncopy. Garbage StackMemory (GSM) AND ab implemented by... 0 230 Garbage StackPointer (GSP) 1. t a2. a  t & b3. t  GSM[GSP++] 1 46 3 17 2 3 0 4 0 ...

  17. Programmer-Controlled Garbage • Put extra data in a programmer-manipulable location. • What if destination location isn’t empty? • Signal an error, or • Use an op that does something reversible anyway • Provide undo operations to accomplish “unexpanding” inverses of expanding ops. • 1st method: Errors on non-empty destination: • AND A B C -If (A=0) AB&C else error • UNAND ABC -If (A=B&C)AB&C else error • 2nd method: Use always-reversible store ops. • ANDX A B C - A  A  (B & C) (self-undoing!)

  18. Pendulum - packaged chip photo

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