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This overview explores the architecture of Field Programmable Gate Arrays (FPGAs), focusing on three essential elements: Logic Blocks, Input/Output Blocks, and interconnection wires and switches. It highlights the significance of Look-Up Tables (LUTs), which store truth tables for functions, enabling FPGAs to implement any n-bit function during programming via SRAM technology. The discussion also compares various programming technologies, such as Anti-fuse and One-Time Programmable designs, and outlines the advantages and disadvantages of SRAM-based implementations.
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Field Programmable Gate Arrays Sharif University of Technology Department of Computer Engineering Alireza Ejlali
FPGA • Three elements • Logic Blocks • I/O Blocks • Interconnection wires and switches • Regularity • Two dimensional structure • Field Programmable
LUT-Based Logic Cells • LUT is a memory which contains the truth-table of a function. • LUT with n inputs can implement any n-bit function. • Truth-table is placed in LUT during the FPGA programming. • LUTs are implemented with SRAM.
PLD Programming Technologies • FPGA • One Time Programmable • Anti-fuse • Re-Programmable • SRAM • CPLD • One Time Programmable • Fuse • Re-Programmable • EPROM • E2PROM
SRAM • Logic Blocks (LUT) • Storage (Embedded RAM) • Programmable Connections (Routing) • Pass transistor • Transmission gates • Multiplexer
SRAM • Advantages • Easily changeable • High density • Track latest SRAM technology • Disadvantage • Volatile • High Power dissipation
Anti-fuse • Less expensive than SRAM technology • One time programmable