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Generalized Faulty Block Model for Automatic Test Pattern Generation

Generalized Faulty Block Model for Automatic Test Pattern Generation. F. Podyablonsky, N. Kascheev. EWDTS 2009, Moscow, Russia, September 18 -21. Outline. Continuous model of digital circuit ATPG technique Faults modeling method Experimental results.

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Generalized Faulty Block Model for Automatic Test Pattern Generation

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  1. Generalized Faulty Block Model for Automatic Test Pattern Generation F. Podyablonsky, N. Kascheev EWDTS 2009, Moscow, Russia, September 18 -21

  2. Outline • Continuous model of digital circuit • ATPG technique • Faults modeling method • Experimental results EWDTS 2009, Moscow, Russia, September 18 -21

  3. Continuous approach Continuous analogues for logic functions EWDTS 2009, Moscow, Russia, September 18 -21

  4. ATPG technique Constructing objective function EWDTS 2009, Moscow, Russia, September 18 -21

  5. Faults modeling Introducing a faulty block • Common approach to different fault types modeling at the test pattern generation phase: • stuck-at • bridges (wired logic model, voting model, resistive model, …) • opens EWDTS 2009, Moscow, Russia, September 18 -21

  6. Experimental results ATPG results for stuck-at faults in combinational circuits EWDTS 2009, Moscow, Russia, September 18 -21

  7. Experimental results ATPG results for resistive bridges in sequential circuits EWDTS 2009, Moscow, Russia, September 18 -21

  8. Tnank you for attention EWDTS 2009, Moscow, Russia, September 18 -21

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