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DC MOTOR

DC MOTOR. DC MOTOR WORKING. H BRIDGE DC MOTOR. INTERFACING WITH DC MOTOR. OPERATION:. TRANSLATE ELECTRIC ENERGY MECHANICAL MOVEMENT + TO – LEADS PRODUCE THE MOTOR CLOCKWISE REVERSE POLARITY MOTOR REVERSES LOAD VOLTAGE SPEED IS REPRESENTED BY RPM.

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DC MOTOR

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  1. DC MOTOR LAKSHMI.B.E.

  2. DC MOTOR WORKING LAKSHMI.B.E.

  3. H BRIDGE DC MOTOR LAKSHMI.B.E.

  4. LAKSHMI.B.E.

  5. LAKSHMI.B.E.

  6. LAKSHMI.B.E.

  7. INTERFACING WITH DC MOTOR LAKSHMI.B.E.

  8. OPERATION: • TRANSLATE ELECTRIC ENERGYMECHANICAL MOVEMENT • + TO – LEADS PRODUCE THE MOTOR CLOCKWISE • REVERSE POLARITY MOTOR REVERSES • LOAD VOLTAGE • SPEED IS REPRESENTED BY RPM LAKSHMI.B.E.

  9. USING L293,RUN A DC MOTOR, SWITCH P2.0 IF SW=0,ROTATE CLOCK,SW=1 , ROT ANTICLOCK • ORG 0H • MAIN: • SETB P1.0 ; ENABLE • JNB P2.0 ,CLOCK ;CHECK THE CLOCK • CLR P1.1;INPUT 1 ;COUNTER CLOCKWISE • SETB P1.2;INPUT2 ; • CLOCK: • SETB P1.1;INPUT 1 ; CLOCKWISE • CLR P1.2;INPUT2 • SJMP MAIN • END LAKSHMI.B.E.

  10. DS12887 INTERFACING WITH 8051 LAKSHMI.B.E.

  11. DS 12887: LAKSHMI.B.E.

  12. DS 12887: LAKSHMI.B.E.

  13. DS 12887: LAKSHMI.B.E.

  14. PIN DIAGRAM FOR DS 12887 LAKSHMI.B.E.

  15. LAKSHMI.B.E.

  16. LAKSHMI.B.E.

  17. LAKSHMI.B.E.

  18. Memory: • 128 bytes of non volatile ram • 14 bytes of RAM ,for clock ,calender and control register • 114 bytes of NV-RAM LAKSHMI.B.E.

  19. AS:ADDRESS STROBE is an input pin,on the falling edge it will cause the address to be latched MOT: DS: • MOT is connected to ground • MOT=GND • DATA STROBE • DS=READ • DS is connected to RD of 8051 LAKSHMI.B.E.

  20. R/W:input pin .MOT=GNDWrite signal CS: IRQ: • Active low signal • To access read and write • It only access external vge>4.25v • Output pin • Active low pin • It is in “B”register LAKSHMI.B.E.

  21. SQW: RESET: • Output pin .it produce 15 different square wave • Pin 18 is reset.It is an input. • Active low pin LAKSHMI.B.E.

  22. LAKSHMI.B.E.

  23. LAKSHMI.B.E.

  24. LAKSHMI.B.E.

  25. LAKSHMI.B.E.

  26. LAKSHMI.B.E.

  27. Setting the time(16:15:50 pm) MOV R0,#10;ADDR OR ’A’ REGISTER MOV A,#20H; D6-D4 010 OSC MOVX @R0,A;SEND IT TO REG MOV R0,#11; REG B MOV A,#83H; BCD 24 HRS,DAYLIGHT MOV X @R0,A • MOV R0,#0; SECONDS AT ADDR 0 • MOV A,#50H;SECONDS=50 • MOVX @R0,A; SET SECONDS • MOV R0,#02; • MOV R0,#15H; • MOVX @R0,A; • MOV R0,#04; • MOV R0,#16H • MOVX @R0,A; LAKSHMI.B.E.

  28. Interfacing external memory LAKSHMI.B.E.

  29. ROM • Non-volatile Data • Mask ROM • Data written during chip fabrication • PROM • Fuse ROM: Non-rewritable • EPROM: Erase data by UV rays • EEPROM: Erase and write through electrical means • Speed 2-3 times slower than RAM • Upper limit on write operations • Flash Memory – High density, Low Cost LAKSHMI.B.E.

  30. ROM: LAKSHMI.B.E.

  31. LAKSHMI.B.E.

  32. RAM • Random write and read operation for any cell • Volatile data • Most of computer memory • DRAM • Low Cost • High Density • Medium Speed • SRAM • High Speed • Ease of use • Medium Cost LAKSHMI.B.E.

  33. RAM: LAKSHMI.B.E.

  34. LAKSHMI.B.E.

  35. LAKSHMI.B.E.

  36. ADC and DAC INTERFACING LAKSHMI.B.E.

  37. ADC : • ADC is widely used for data acquisition • Digital computers are digital but physical world is analog(continuous) • TRANSDUCER: • Physical quantity is converted to electrical quantity • Ex: load cell, strain gauge • To translate this analog to digital converter is used. LAKSHMI.B.E.

  38. Step size: • The smallest change that can discerned by adc. • Conversion time: • The time takes to convert analog to digital LAKSHMI.B.E.

  39. LAKSHMI.B.E.

  40. CS:Active low input RD: WR:START CONVERSION) • Input signal • Active low signal • Analogdigital • When CS=0 • is applied to RD pin • RDOE • Active low signal • Analogdigital • When CS=0 • is applied to WR pin LAKSHMI.B.E.

  41. CLK IN CLK R • Input signal • External clock is used for timing • For internal clock generator CLK IN and CLK R are connected together to a capacitor and resistor LAKSHMI.B.E.

  42. Vcc:+5v power supply Vin(+) and Vin(-): INTR: • They are differential anlog inputs Vin=Vin(+) -Vin(-) • Output pin • Active low • It is normally high,When conversion is finished ,it goes to low to CPU LAKSHMI.B.E.

  43. D0 to D7:DIGITAL DATA OUTPUTPARALLEL ADC.Dout= Vin step size LAKSHMI.B.E.

  44. LAKSHMI.B.E.

  45. LAKSHMI.B.E.

  46. LAKSHMI.B.E.

  47. RD BIT P3.7WR BIT P3.6INTR BIT P3.2;END OF CONVERSION;DISPLAYMOV P1,#0FFHSETB INTRAGAIN:CLR WRSETB WRHERE:JB INTR ,HERECLR RDMOV P1,#55HSETB RDSJMP AGAIN LAKSHMI.B.E.

  48. DAC INTERFACING LAKSHMI.B.E.

  49. LAKSHMI.B.E.

  50. LAKSHMI.B.E.

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