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CPSC 483 – Computer System Design

CPSC 483 – Computer System Design. Coff-e-mail Critical Design Review March 10, 2004 Don McGee Eric Peden Payton Quackenbush Zack Roman. Review of Problem Needs. Department wants convenient way to keep tabs on the coffee pot.

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CPSC 483 – Computer System Design

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  1. CPSC 483 – Computer System Design Coff-e-mail Critical Design Review March 10, 2004 Don McGee Eric Peden Payton Quackenbush Zack Roman Critical Design Review

  2. Review of ProblemNeeds • Department wants convenient way to keep tabs on the coffee pot. • Department wants easy way to remotely check level of coffee in the pot. Critical Design Review

  3. Review of ProblemGoals and Objectives Goals • Design a complete embedded network system • Build complex analog-digital interfaces (advanced sensors, web cam) Objectives • Unobtrusive footprint • Current coffee status • Statistics and mug shots • Remote notification Critical Design Review

  4. Design • Snap TiltKit microcontroller – server • FPGA, CMUcam – image processing • PIC, A/D converter – sensor processing Critical Design Review

  5. System Block Diagram Critical Design Review

  6. Server • User interface to coffee machine • Event notifications • Statistics • Mug shots Critical Design Review

  7. Server (cont.) • Completed tasks • Software architecture • 50% of Java code written • Remaining tasks • Approve network access • Remaining code Critical Design Review

  8. Server (cont.) • Testing procedures • Unit tests • Command-line event simulator • Load tolerance Critical Design Review

  9. Sensors • PIC polls sensors for data • Processes signal data for use by server • Controls camera module and passes compressed images to server • Controls output of LCD Critical Design Review

  10. Sensors (cont.) • Completed tasks • Validated sensor data • I/O Protocols / LCD Interface • Pinouts • Remaining tasks • Breadboard prototype • Sensor mounting • Programming Critical Design Review

  11. Sensors (cont.) • Testing procedures • Verify sensor values from LCD • Basic I/O to server to verify serial protocol • Data verification will be done server-side Critical Design Review

  12. Camera • Separate camera module needed • PIC too slow for JPEG compression • Standalone module alleviates synchronization issues • Design revision: FPGA for camera input/image processing Critical Design Review

  13. Camera (cont.) • Completed tasks • Camera output protocol • Camera color spaces • Sample JPEG compression implementation • Remaining tasks • Modify JPEG code • Select FPGA • CameraSensor module protocol Critical Design Review

  14. Camera (cont.) • Test procedures • Test camera output with small image window and LCD • Cover camera with solid color cards • Software simulation of FPGA • Input pre-built RAW image data • Output JPEG data to file Critical Design Review

  15. Parts List Critical Design Review

  16. Conclusion Questions? Critical Design Review

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