Introduction to Traditional Software and low-level machine programming

1. Introduction to Traditional Software and low-level machine programming Fred Kuhns

2. Arithmetic-Logical Unit (ALU) Control Unit Primary Memory Device Controller Device Device Controller Device Device Controller Device Device Controller Device Programmers View Central Processing Unit (CPU) CSE361S – Introduction to Systems Software

3. Traditional Pentium PC Architecture Addr/Data Ctrl Ctrl Cache CPU North- Bridge DRAM Addr/Data/Ctrl PCI Bus Intr NMI INIT SouthBridge (PIIX3) (PIC, PIT, …) PCI Devices ISA Bus ISA Devices Super-IO BIOS BIOS RTC Uarts Kbd/Mse Floppy Parallel ... CSE361S – Introduction to Systems Software

4. . . . . . . . . . Zooming in on Computer Architecture CPU Memory 0 1 PC MAR IR Reg N Instruction MBR Reg 1 Reg 0 Instruction I/O AR Instruction execution unit I/O BR Data Devices Data Data Data . . Buffers N PC - Program Counter IR - Instruction Register MAR - Memory Address Register MBR - Memory Buffer Register I/O AR - Input/Output Address Register I/O BE - Input/Output Buffer Register CSE361S – Introduction to Systems Software

5. Processor Registers • User-visible registers • Enable programmer to minimize main-memory references by optimizing register use • Control and status registers • Used by processor to control operation of the processor • Used by operating-system routines to control the execution of programs CSE361S – Introduction to Systems Software

6. User-Visible Registers • May be referenced by machine language • Available to all programs - application programs and system programs • Types of registers • Data - can be assigned by the programmer • Address - contain main memory address of data and instructions. Or may contain a portion of an address that is used to calculate the complete address. • Condition Code or flags CSE361S – Introduction to Systems Software

7. Control and Status Registers • Program Counter (PC) • Contains the address of an instruction to be fetched • Instruction Register (IR) • Contains the instruction most recently fetched • Program Status Word (PSW) • condition codes • Interrupt enable/disable • Supervisor/user mode CSE361S – Introduction to Systems Software

8. Fetch Cycle Execute Cycle Fetch Next Instruction Execute Instruction HALT START Instruction Cycle • Processor fetches instruction from memory • PC contains address of next instruction to be fetched • PC incremented after each fetch CSE361S – Introduction to Systems Software

9. Modern Instruction Cycle • (a) A three-stage pipeline • (b) A superscalar CPU (from Stallings, Operating Systems, 4th Edition) CSE361S – Introduction to Systems Software

10. 15 4 0 address opcode Example Instruction set 0xFFF word4095 0xFFE word4094 • Instruction and data words are 16-bits • Instructions are made up of two fields • 4-bit operation code (opcode)0001 - Load accumulator from memory0010 - Store accumulator to memory • 12-bit operand address field: so we can directly address memory from 0x000 to 0xFFF (212-1 = 4095d) • Corresponds to 0x1000 words or 0x2000 Bytes of memory (but only words are addressable) • Integers are represented as 16-bit, two’s compliment values in Big-Endian order. • Memory is arranged as a linear array of 16-bit words • i.e. memory is word addressable with address N corresponding to word N or Bytes 2N and 2N+1. 0xFFD word4093 word4092 0xFFC Instruction Format 0x002 word2 0x001 word1 0x000 word0 Byte0 Byte1 CSE361S – Introduction to Systems Software

11. 0003 1940 1 - load Step 1 Step 2 302 0005 5941 3 + 2 = 5 Step 3 Step 4 5 - add 303 2941 0005 Step 5 Step 6 Example of Program Execution Memory Memory Registers Registers 300 1940 300 1940 PC PC 300 301 xxx 301 301 5941 5941 AC AC 302 2941 302 2941 IR IR 1940 0003 0003 940 940 941 941 0002 0002 Memory Memory CPU Registers Registers 300 300 1940 1940 PC 301 PC 301 301 5941 xxx 5941 AC 0003 302 302 2941 AC 2941 XXXX IR IR 5941 0003 940 0003 940 941 941 0002 0002 Memory Memory Registers Registers 300 1940 300 1940 PC 302 301 PC 5941 301 5941 xxx AC 302 0005 2941 302 2941 AC 0005 XXXX IR 0003 940 IR 2941 0003 940 941 941 0002 2 - store CSE361S – Introduction to Systems Software

12. clock handler Interrupts – devices notify CPU of some event Processor Device table dispatcher (interrupt handler) X Bus command status rt-counter Timer Interrupt is generated every 10ms, used by OS for accounting and resource (CPU) sharing. CSE361S – Introduction to Systems Software

13. Fetch Cycle Execute Cycle Interrupt Cycle Interrupts Disabled Check for & Process Int Fetch Next Instruction Execute Instruction START Interrupts Enabled HALT Instruction Cycle with Interrupts Processor checks for interrupts If (no interrupts pending) • fetch the next instruction else (interrupt is pending) • save current PC value • set PC to start of dispatcher System interrupt dispatcher: • saves some general purpose registers • determines interrupt type (or id) • calls handler by indexing into an array of function pointers. CSE361S – Introduction to Systems Software

14. Input/Output Overview • Fundamental operations performed by a computing system • Processing of data (implement an algorithm) • Perform I/O (move data into and out of the system) • Large diversity in I/O devices, capabilities and performance • Common Categories: storage, transmission and user-interface devices. • Examples: display, keyboard, network, hard disks, tape drives, CDROM ... • System goal is to • provide simple and consistent interface to user • optimize I/O use for maximum concurrency • Mechanisms used by OS • device drivers provide standard interface to I/O devices CSE361S – Introduction to Systems Software

15. Device Driver I/O and Devices Processor Device table dispatcher (interrupt handler) X Bus command status data 0 data 1 Device Controller (firmware and logic) ... data N-1 Device X CSE361S – Introduction to Systems Software

16. I/O Hardware • Common concepts • Port (device-machine communication point) • Bus (daisy chain or shared communication channel) • Controller (host adapter) • Devices have addresses, used by • Direct I/O instructions • Memory-mapped I/O • Common Techniques • Programmed I/O: Direct I/O with polling. • Interrupt Driven I/O: Device notifies CPU when I/O operation completes • Memory Mapped I/O: rather than reading/writing to controller registers the device is mapped into the OS memory space. increased efficiency • Direct memory access (DMA): DMA controller read and write directly to memory, freeing the CPU to do other things. CPU notified when DMA complete CSE361S – Introduction to Systems Software

17. Another way to Describe I/O Modes • Synchronous (Programmed I/O) - control returns to user program only upon I/O completion. • Idle CPU until the next interrupt • wait loop (contention for memory access). • Asynchronous (Interrupt driven I/O) - control returns to user program before I/O completion. • System call – request to the operating system to allow user to wait for I/O completion. • Device-status table contains entry for each I/O device indicating its type, address, and state. CSE361S – Introduction to Systems Software

18. Clocks and Timers • Provide current time, elapsed time, timer • Programmable interval timer: used for timings, periodic interrupts • ioctl (on UNIX) covers odd aspects of I/O such as clocks and timers CSE361S – Introduction to Systems Software

19. Blocking versus Nonblocking I/O • Blocking - process suspended until I/O completed • Easy to use and understand • Insufficient for some needs • Nonblocking - I/O call returns what is available • User interface, data copy (buffered I/O) • Implemented via multi-threading • Returns quickly with count of bytes read or written • Asynchronous - process runs while I/O executes • Difficult to use • I/O subsystem signals process when I/O completed CSE361S – Introduction to Systems Software

20. Low-level System Software • Resource Scheduling • Efficiency, fairness, prioritized access • Buffering - store data in memory while transferring between devices • To cope with device speed mismatch, transfer size mismatch and to maintain “copy semantics” • Caching - fast memory holding copy of data • Always just a copy, Key to performance • Spooling - hold output for a device • Used when device can serve only one request at a time, i.e., Printing • Device reservation - provides exclusive access to a device • System calls for allocation and deallocation • Watch out for deadlock • Error handling: • OS can recover from disk read, device unavailable, transient write failures • Most return an error number or code when I/O request fails • System error logs hold problem reports CSE361S – Introduction to Systems Software

21. Example I/O Request to HW Operations • Consider reading a file from disk for a process • Determine device holding file • Translate name to device representation • Physically read data from disk into buffer • Make data available to requesting process • Return control to process CSE361S – Introduction to Systems Software

22. Improving Performance • I/O a major factor in system performance • Demands CPU to execute device driver, kernel I/O code • Context switches due to interrupts • Data copying • Network traffic especially stressful • Improving Performance • Reduce number of context switches • Reduce data copying • Reduce interrupts by using large transfers, smart controllers, polling • Use DMA • Balance CPU, memory, bus, and I/O performance for highest throughput CSE361S – Introduction to Systems Software