Ge Semiconductor Devices for Cryogenic Power Electronics - IV

1. Ge Semiconductor DevicesforCryogenic Power Electronics - IV Electrochemical Society Seventh International Symposium on Low Temperature Electronics 14 October 2003, Orlando, Florida

2. R. R. Ward, W. J. Dawson, L. Zhu, R. K. KirschmanGPD Optoelectronics Corp., Salem, New Hampshire M. J. Hennessy, E. K. Mueller MTECH Laboratories, Ballston Lake, New York R. L. Patterson, J. E. DickmanNASA Glenn Research Center, Cleveland, Ohio A. HammoudQSS Group Inc., Cleveland, Ohio

3. Cryogenic Power Electronics • Semiconductor Devices (diodes and transistors) • For Use down to 30 K and Lower • For Power Management and Actuator Control • For Spacecraft • Supported by NASA Glenn Research Center

4. Why Use Ge?

5. Why Ge Devices? • Si-Based Circuits Demonstrated, but only > 77 K • Si Bipolar Devices Cease Operation < ~100 K • Applications Require Operation < 77 K, to ~30 – 40 K • Possible Materials for < 77 K are Ge and SiGe • Ge Devices Can Operate to Lowest Cryogenic Temperatures (~ 0 K) • All Device Types – Diodes, Field-Effect Transistors, Bipolar Transistors

6. Development Program

7. Development Program • Parameters • Low power (~10 W) and medium power (~100 W) • Temperature range 300 K to ~20 K • Past • Investigated existing Ge semiconductor devices at cryogenic temperatures (diodes, BJTs, JFETs) • Designed and fabricated Ge cryogenic power diodes (P--N, 10 A, 300 V) • Devices under Development • MISFETs (lateral, vertical implanted, vertical epi) • JFETs (lateral, vertical) • BJTs (vertical implanted, vertical epi) • IGBTs (vertical implanted, vertical epi)

8. Ge Cryo Power Diodes

9. Ge Cryo Power DiodesP--N Bulk Design Metal P+ implant Guard ring(s) N– ( ) Metal N+ implant

10. Ge Cryo Power Diodes - Forward Voltage

11. Ge Cryo Power Diodes - Forward Voltage

12. Ge Cryo Power Diodes - Forward I-V

13. Ge Cryo Power Diodes - Forward I-V

14. Ge Cryo Power Diode – Forward I-V

15. Ge Power Diodes – Reverse Breakdown

16. Ge Power Diodes – Reverse Recovery

17. Ge Power Diodes – Reverse Recovery

18. Ge Power Diodes – Reverse Recovery

19. Ge Power Diodes – Reverse Recovery

20. Ge Power Diodes – Reverse Recovery

21. Ge Cryo Power Diodes - Future • Improved Guard-Ring Designs and Tailored Implant • Higher Vr • Schottky Designs • Lower forward voltage • N--P (compared to P--N) • Possible improvement in Vf and Vr • Possible improvement in speed/reverse recovery • Possible elimination of “backlash” at 4 K • Possible lower reverse leakage

22. Ge Cryo Power MISFETs

23. G D ~1.8 mm S S G Ge Cryo Power JFET or MISFET

24. Basic Lateral Ge MISFET Design Source Gate dielectric Drain Gate N+ implant P substrate Substrate P+ implant

25. Ge Power MISFET at 300 K

26. Ge Power MISFET at 77 K

27. Ge Power MISFET at 4 K

28. Source Gate Gate dielectric P implant N+ implant N substrate Drain N+ implant Basic Vertical Ge MISFET Design Two versions: double-implant (above) and epi

29. Source Gate dielectric Gate P+ implant N epi P– substrate Drain P+ implant Basic Vertical Ge MISFET Design Two versions: double-implant and epi (above)

30. Ge Cryo Power MISFETs - Plans • Larger-Area and Modified Doping (for Lateral Ge) • Higher I and higher Vbk • Vertical Designs for Ge • Higher I and higher Vbk • Reverse Double-Implant Vertical Design for Ge • Better results than present double-implant design

31. Ge Cryo Power JFETs

32. Ge JFET Cross-Section (n-channel)

33. Power Ge JFET at 300 K

34. Power Ge JFET at 77 K

35. Power Ge JFET at 4 K

36. Another Power Ge JFET at 20 K

37. Power JFETs - Plans • P-Type • Complementary circuits • Higher I and Vbk • Vertical (SIT) Design • Higher I and higher Vbk

38. Ge CryoBipolar Junction Transistors

39. Ge Bipolar – Double-Implant Emitter N+ implant Base P implant N– substrate Collector N+ implant

40. Ge Bipolar – Epitaxial Emitter N+ implant Base P epi N– substrate Collector N+ implant

41. Power BJTs - Plans • Reverse Double-Implant Design for Ge • Better characteristics than present double-implant design? • Epitaxial Design for Ge

42. Ge Cryo IGBTs

43. Emitter Gate Gate dielectric P implant N+ implant N– substrate Collector P+ implant Basic Ge IGBT Design Two versions: double-implant (above) and epi

44. Emitter Gate dielectric Gate P+ implant N epi P– substrate Collector N+ implant Basic Ge IGBT Design Two versions: double-implant and epi (above)

45. Summary • We Have Characterized Commercial Ge Devices (Diodes and Bipolars) at Cryogenic Temperatures • In a Separate Development We Have Demonstrated that Ge JFETs Work Well at Cryogenic Temperatures • All Types of Ge Devices Can Operate to Deep Cryogenic Temperatures – to 20 K, as Low as 4 K • Developed 10-A Ge Cryogenic Power Diodes with High Reverse Breakdown and Low Forward Voltage

46. Summary – cont’d • Characterized Ge MIS Structures at Room and Cryogenic Temperatures • Made Ge Power MISFETs that Operate from Room Temperature down to 4 K • Made Ge Power JFETs that Operate from Room Temperature down to 4 K • Improved MISFETs and JFETs Are in Progress • Ge BJT and IGBT Fabrication Is in Progress