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MIPS processor continued

Learn how to appropriately connect the different parts of a MIPS processor to carry out functions such as R-type, lw, sw, and beq instructions. Design a simplified MIPS processor that supports only addi instructions by designing the data path.

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MIPS processor continued

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  1. MIPS processor continued

  2. Review • Different parts in the processor should be connected appropriately to be able to carry out the functions. • Connections depending on what we need • Learnt R-type, lw, sw, beq

  3. In Class Exercise Question • Design a simplified MIPS processor that supports only addi. Assume the control signals have been generated and only the data path needs to be designed. • addi $rt, $rs, imm • opcode (6 bits) rs (5 bits) rt (5 bits) imm (16 bits)

  4. In Class Exercise Answer • Design a simplified MIPS processor that supports only addi. Assume the control signals have been generated and only the data path needs to be designed. • addi $rt, $rs, imm • opcode (6 bits) rs (5 bits) rt (5 bits) imm (16 bits) 26:21 20:16 15:0

  5. lw & sw?

  6. Data path only for lw and sw (answer)

  7. Data path for both R-type and memory-type instructions add $rd, $rs, $rt, format: opcode (6 bits) rs (5 bits) rt (5 bits) rd (5 bits) 00000 funct (6 bits) lw $rt, offset_value($rs): opcode (6 bits) rs (5 bits) rt (5 bits) offset (16 bits) sw $rt, offset_value($rs): opcode (6 bits) rs (5 bits) rt (5 bits) offset (16 bits)

  8. Data path for both R-type and memory-type instructions add $rd, $rs, $rt, format: opcode (6 bits) rs (5 bits) rt (5 bits) rd (5 bits) 00000 funct (6 bits) lw $rt, offset_value($rs): opcode (6 bits) rs (5 bits) rt (5 bits) offset (16 bits) sw $rt, offset_value($rs): opcode (6 bits) rs (5 bits) rt (5 bits) offset (16 bits)

  9. Answer

  10. Datapath for R-type, memory, and branch operations

  11. Datapath for R-type, memory, and branch operations (Answer)

  12. Datapath for Memory, R-type and Branch Instructions, plus the control signals

  13. Jump Instruction • Jump instruction seems easy to implement • We just need to replace the lower 28 bits of the PC with the lower 26 bits of the instruction shifted by 2 bits • The shift is achieved by simply concatenating 00 to the jump offset week-13-3.ppt

  14. 31 26 25 0 0 0 0 0 1 0 opcode Address Implementing Jumps • The one we have supports arithmetic/logic instructions, branch instructions, load and store instructions • We need also to support the jump instruction • What are the changes we need to make?

  15. Add j?

  16. Supporting Jump Instruction

  17. In Class Exercise week-14-1.ppt

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