1 / 26

MIPS Microarchitecture Multicycle Processor

MIPS Microarchitecture Multicycle Processor. Lecture 19 Digital Design and Computer Architecture Harris & Harris Morgan Kaufmann / Elsevier, 2007. Review: Single-Cycle Processor. Multicycle Processor Datapath. Building Blocks. Read Instruction. Read Source Operand ( rs ).

dawson
Télécharger la présentation

MIPS Microarchitecture Multicycle Processor

An Image/Link below is provided (as is) to download presentation Download Policy: Content on the Website is provided to you AS IS for your information and personal use and may not be sold / licensed / shared on other websites without getting consent from its author. Content is provided to you AS IS for your information and personal use only. Download presentation by click this link. While downloading, if for some reason you are not able to download a presentation, the publisher may have deleted the file from their server. During download, if you can't get a presentation, the file might be deleted by the publisher.

E N D

Presentation Transcript

  1. MIPS MicroarchitectureMulticycle Processor Lecture 19 Digital Design and Computer Architecture Harris & Harris Morgan Kaufmann / Elsevier, 2007

  2. Review: Single-Cycle Processor

  3. Multicycle Processor Datapath Building Blocks

  4. Read Instruction

  5. Read Source Operand (rs)

  6. Read Source Operand (rs)

  7. Sign-Extend the Immediate

  8. Sign-Extend the Immediate

  9. Add Base Address to the Offset

  10. Load Data from Memory

  11. Write Data Back to Register File

  12. Increment PC by 4

  13. Enhanced Datapath for sw

  14. Enhanced Datapath for sw

  15. Enhanced Datapath for R-Type

  16. Enhanced Datapath for beq

  17. Multicycle Processor Datapath

  18. Multicycle Processor Datapath

  19. Multicycle Processor Control

  20. Multicycle Processor: R-Type

  21. Multicycle Processor: lw

  22. Multicycle Processor: beq

  23. Control Unit?

  24. Control Unit

  25. Multicycle Processor: addi

  26. Next Time Exceptions

More Related