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DAMC-FMC20 Status and general FW/HW remarks

DAMC-FMC20 Status and general FW/HW remarks. Michael Fenner 2nd Follow-up Meeting on MTCA.4 Board Development DESY, 15 th October, 2013. FMC20 - Overview. FMC20 - Status. General: Rev. A produced In operation together with PZT4 „Licensed“ to EicSys Flyer/ Manual/ Package created

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DAMC-FMC20 Status and general FW/HW remarks

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  1. DAMC-FMC20 Status and general FW/HW remarks Michael Fenner 2nd Follow-up Meeting on MTCA.4 Board Development DESY, 15th October, 2013

  2. FMC20 - Overview

  3. FMC20 - Status General: • Rev. A produced • In operation together with PZT4 „Licensed“ to EicSys • Flyer/ Manual/ Package created • Deep analysis/ check • Rev. B under development Practical point of view: • Engineer has done a good job • Board works 100% in our scenario • Total success Product-View: • not MTCA compliant • not FMC compliant • Rev. A bug list is 2 pages long Question: “Lab Quality” or “Industrial Quality”? • No systematic checks  many Rev. A issues would not have been detected • Problem when selling to 3rd parties  We need design process improvement

  4. Schematic Checks for Licensing Avoidable Bugs • Little mistakes in FMC connections  possible problems with 3rd party cards • Little mistakes in AMC connector pin-out  unterminatedclocks (not used) • PCB footprint issues  some chips will be tested first in licensed Rev. B • Data sheet recommendation sometimes not followed  thermal problems ? • “NoERC-markers” not used  no open-pin checking  missing connections • MMC V1.0 and interlock standard not followed (not available at design time) Can be avoided by 2-day check by second person  Omitting checks does not save time!

  5. Conclusion We can be happy with the results of FMC20 test We can not be happy with the design process of our boards Proposed changes in future • Written-down standards (MMC and Interlock) • Single source for symbols and footprints (Robert Wedel) • Identification of unchecked components • Design checklist for checks during development • Production approval checklist • Will be reviewed together before production • Design review by 2ndperson: 2 days, Pareto principle (80% check in 20% time) • Interoperability review • Mechanics review • Error log and feature request list • All digital interfaces over my desk (FMC20, FMC25, MD22, PZT4, …)

  6. Spare Slide 1: MMC V1.0 Architecture DESY offers MMC V1.0 Starter Kit  WE should stick to this Benefits • Common architecture • Common MCU software • Common FW update software • Common JTAG distribution • Common RTM / FMC firmware update

  7. Spare Slide 2: FMC20 Rev. A JTAG Chain

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