Integrated Device Scheduling and Processor Voltage Scaling for System-wide Energy Conservation

1. Integrated Device Scheduling and Processor Voltage Scaling for System-wide Energy Conservation Hui Cheng, Steve Goddard Computer Science and Engineering Univ. of Nebraska-Lincoln

2. Outline • Background • Motivation and problems • I/O-based DPM • Optimal CPU speed • SYS-EDF • Evaluation

3. Background • Power management • Dynamic power management • Task scheduling • EDF+SRP • Preemptive scheduling • I/O device scheduling • Inter-task device scheduling • Periodic task definition

4. Motivation • Previous research has focused on: • Energy conservation for the processor • Much work has been done on DVS • Ignores energy conservation of I/O devices • Energy conservation for I/O devices • Most techniques cannot be applied to hard real-time systems • Ignores CPU energy conservation • System-wide energy conservation is needed! • How to integrate DVS and DPM?

5. Device power model Serving I/O reqs Busy Proportional to the job execution time Active Ready to serve High power state High transition overhead Idle Low power state

6. Current I/O-based DPMs System energy I/O device energy Processor energy Non-preemptive task scheduling Preemptive task scheduling LEDES Offline scheduling Online scheduling MUSCLES EDS ??? MDO

7. ASD • Aggressive shut down • Include the transition delay in the WCET • Sufficient schedulability condition • Problems: • Reduces schedulability for some systems • Does not consider the energy penalty associated with power state transitions

8. CEA-EDF

9. CEA-EDF vs. EASD

10. CPU power model • Dynamic power consumption • Leakage power consumption • Total power consumption

11. Optimal speed • CPU speed is critical to achieve system-wide energy conservation • Lowest speed: • Good for saving the dynamic power consumption of CPUs • Highest speed: • Good for the energy conservation of devices • Good for reducing leakage energy consumption of CPUs • Optimal speed: the speed to balance the energy consumption of all components.

12. Optimal speed (cont’d) • Active device set • Containing all devices that are in the active state at current time. • Optimal speed • Energy efficiency scale:

13. Energy efficiency scale examples

14. Example

15. SYS-EDF • The DVS scheduling is based on the DS algorithm proposed in [1]. • High speed • Low speed

16. SYS-EDF (cont’d) • Use CEA-EDF to schedule devices • Keep track of the active device set and compute/adjust the optimal speed. • The processor speed is never set below the optimal processor speed. • Same techniques were used in [2][3] • Only scheduled at scheduling points

17. Evaluation

18. Conclusion and future work • SYS-EDF = I/O based DPM+DVS+Opt speed • Provide more energy savings with respect to: • DVS-alone • I/O based DPM alone • The straightforward integration of DVS and DPM • Current and future work • Consider the device transition delay in the computation of optimal speed. • Consider the overhead of adjusting CPU voltage • Extend to other task models

19. References • [1] Zhang, F., Chanson, S., Processor Voltage Scheduling for Real-Time Tasks with Non-Preemptible Sections. • [2] Jejurikar, R., Pereira, C., Gupta, R., Leakage aware dynamic voltage scaling for real-time embedded systems. • [3] Zhuo, J., Chakrabarti, C., System-Level Energy-Effcient Dynamic Task Scheduling. • [4] Swaminathan, V., Chakrabarty, K., and Iyengar, S.S., Dynamic I/O Power Management for Hard Real-time Systems. • [5] Swaminathan, V., and Chakrabarty, K., Pruning-based, Energy-optimal, Deterministic I/O Device Scheduling for Hard Real-Time Systems.

20. Thank you!

21. Transition overhead

22. CEA-EDF vs. EASD (cont’d)

23. EASD • Utilize job slack to further save energy