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Deposition thickness based high-throughput N ano-imprint template

EE235 Course Presentation N ano- I mprint. Deposition thickness based high-throughput N ano-imprint template. Microelectronic Engineering 84 (2007) 594–598. Muhammad Mustafa Hussain a , Ed Labelle b ,

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Deposition thickness based high-throughput N ano-imprint template

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  1. EE235 Course Presentation Nano-Imprint Deposition thickness based high-throughput Nano-imprint template Microelectronic Engineering 84 (2007) 594–598 Muhammad Mustafa Hussaina, Ed Labelleb, Barry Sassmana, Gabe Gebarab,Sidi Laneeb, Naim Moumenc, Larry Larsona a SEMATECH, 2706 Montopolis Dr., Austin, TX b Advanced Technology Development Facility (ATDF), Austin, TX c International Business Machines (IBM) Presented by Liang Pan March 21, 2007

  2. EE235 Course Presentation Nano-Imprint Related Research • Main limitation • Cannot pattern large area * Gun-Young Jung et al. NANOLETTERS2006V6, No. 3351-354

  3. EE235 Course Presentation Nano-Imprint Related Research • Main limitation • Very hard achieve very small linewidth *Zhaoning Yu, et al. HP Labs Research

  4. Repeat Oxidized Si SiO2 CMP Etching Si EE235 Course Presentation Nano-Imprint Related Research • Main limitation • It has bad linewidth and pitch control *Heon Lee, US Patent No. 6,759,180 (6 July 2004) **S.R. Sonkusale, et al. Physica E 28 (2005)107–114

  5. EE235 Course Presentation Nano-Imprint Motivation of the Paper • Combine all the ideas • Wafer-size pattern transfer • Good linewidth and pitch control • Faster and more reliable process Proposed Applications • Nano-Wire fabrications

  6. CMP Release EE235 Course Presentation Nano-Imprint Method • Alternately deposit HfO2 & TiN using ALD • Planarization using CMP • Selective wet or dry etching • Challenges • Pillars • CMP

  7. EE235 Course Presentation Nano-Imprint Fabricated Mask • sub-15nm linewidth template patterns with5 nm gaps • No imprinting lithography results were presented in this work

  8. Flip Proposed Nano-Wire Fabrication Possible but very difficult

  9. Conclusion • Fabricated wafer-size imprint mold with sub-15nm features using conventional micro-fabrication techniques • Still some major challenges • CMP is very difficult and tedious for unconventional structures and materials • Some feature size and line roughness is determined by the capability of other lithography techniques.

  10. EE235 Course Presentation Nano-Imprint Thank you! Questions?

  11. EE235 Course Presentation Nano-Imprint Supplemental Materials • 25nm-wide silicon with height aspect ratio of 13 can be achieve using HSQ but has much larger pitch*. • Deposition thickness based technique could be more promising if use this technique also. * St. Trellenkamp, Microelectronic Engineer. 67–68(2003)376

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