Logic Synthesis in IC Design and Associated Tools The Espresso-MLD Tool

1. Logic Synthesis in IC Design and Associated Tools The Espresso-MLD Tool Wang Jiang Chau Grupo de Projeto de Sistemas Eletrônicos e Software Aplicado Laboratório de Microeletrônica – LME Depto. Sistemas Eletrônicos Universidade de São Paulo

2. MLD: Multilevel Minimizer • Applied after decomposition • Based on Espresso-II (2-level minimizer) • Exploration of (implicit) don´t cares • Uses R-Minimality • 100% Testability is guaranteed

3. Node Minimization • Problem: • Given a Boolean network, optimize it by minimizing each node as much as possible. • Note: • The initial network structure is given. Typically applied after the global optimization, i.e., division and resubstitution. • We minimize the function associated with each node. • What do we mean by minimizing the node “as much as possible”?

4. F F 1 2 F 3 F 4 X X X 1 2 3 Functions Implementable at a Node • In a Boolean network, we may represent a node using the primary inputs plus the intermediate variable (including outputs), as long as the network is acyclic. Boolean Network =(F,PO) -primary inputs (PIs): {x1, x2,x3} -intermediate variables (IVs): {y1,y2, y3,y4} -primary outputs (POs): {z1,z2} For each intermediate node j, F is the on-set of the incompletely specified function (fj,dj, rj) 1 2 3 4 5 6 7

5. Functions Implementable at a Node • The set of implementable functions at j provides the solution space of the local optimization at node j. • TFOj (transitive fan-out)= {node i s.t. i = j or  path from j to i} • Equivalently, TFIj (transitive fan-in)= {node i s.t.  path from i to j}

6. Prime and Irredundant Boolean Network Consider a sum­of­products expression Fj associated with a node j. Definition: Fj is prime (in multi­level sense) if for all cubes c Fj, no literal of c can be removed without changing the functionality of the network. Definition: Fj is irredundant if for all cubes c  Fj, the removal of c from Fj changes the functionality of the network.

7. Prime and Irredundant Boolean Network Definition: A Boolean network is prime and irredundant if Fj is prime and irredundant for all j. Theorem: A network is 100% testable for single stuck­at faults (s­a­0 or s­a­1) iff it is prime and irredundant.

8. External Don't Care Conditions- 1 • Controllability don't care set DXP or CDCin • Input patterns never produced by the environment at the network's input (refer to all outputs). • Observability don't care set DXOior ODCout_I (for i={1,2,…p}=|PO| • Input patterns representing conditions when an output is not observed by the environment. • Relative to each output. • Vector notation used: ODCout.

9. External Don't Care Conditions- 2 • Inputs driven by a decoder. • DXP = x1’x2’x3’x4’+x1x2+x1x3+x1x4+x2x3+x2x4+x3x4. • Outputs observed when x1+x4=1.

10. Internal Don't Care Conditions- 1 • Induced by the multilevel network structure. • The corresponding two-level network does not present such don’t care sets • Intermediate variable or satisfiabilitydon't care conditions • Patterns never produced at the inputs of a subnetwork. • Transitive fan-out or observabilitydon't care conditions • Patterns such that the outputs of a subnetwork are not observed.

11. Internal Don't Care Conditions- 1 • Example: x = a’+b; y= abx + a’cx • CDC of vy includes ab’x+a’x’. Why? • ab’x=0; ab’x is a don’t care condition • a’  x=1; a’x’ is a don’t care condition • Minimize fy to obtain: fy = ax+a’c (let’s check it in the Karnaugh map…).

12. Intermediate Variable Don't Care Conditions • Invariant of the network • In a node vx, x = fx x ≠ fx DIV (or SDC). • Useful to compute controllability don't cares. • Example • Assume x = a’ + b • Since x ≠ (a’ + b) is not possible, x  (a’ + b)=x’a’ + x’b + xab’ is a don’t care condition.

13. DIV Computation- 1 • Network traversal algorithm • Consider different cuts moving from input to output. • Primary inputs xj have DIVj= • Move cut forward. For every node vk, • Consider DVIk as contributions of predecessors. • Make the union of all DVIj of all vjTFIk • Computing DVI as the union of DVIj for all vj of the network is not practical. It will induce feedbacks in network. Note: DVI Bn+m

14. DVI Computation- 2 • Select vertex va • Computation of DVIa: a  (x2 x3). • TFIa: {x2 , x3} • da = . • Select vertex vb • Computation of DVIb: b  (x1 +a). • TFIb:{a, x1} • db = a  (x2 x3). • Select vertex vc • Computation of DVIc: c  (x4 + a). • TFIc: = {a, x4} • dc = a  (x2 x3).

15. DVI Computation- 3 • Select vertex vd • Computation of DVId: : d  (bc). • TFId: = {b, c} • dd = dz1 =(a  (x2 x3))+(b  (x1 +a))+(c  (x4 + a)). • Select vertex ve • Computation of DVIe: : e  (b + c). • TFIe: = TFId: = {b, c} . • de = dz2 = dd = dz1 =(a  (x2 x3))+(b  (x1 +a))+(c  (x4 + a)).

16. Transitive Fan-out Don't Care Conditions-1 • Conditions under which a change in polarity of a signal x is not perceived at the outputs. • Complement of the Boolean Difference • Boolean Difference is f/x = f|x=1 f|x=0 • Equivalence of perturbed function: (fx(0)  fx(1))’. • Transitive fan-out (observability) don't care computation • Problem • Outputs are not expressed as function of all variables. • Flattened may be needed, but it may explode in size. • Requirement • Local rules for DT computation. • Network traversal.

17. Transitive Fan-out Don't Care Conditions-2 yj = x1 x2 + x1x3 zk = x1 x2 + yjx2 + (yj x3) • Any minterm of x1 x2 + x2 x3 + x2 x3 determines zk independent of yj . • The DT of yj for zk is the set of minterms of the primary inputs for which the value of yj is not observable at zk This means that the two Boolean networks, • one with yj forced to 0 and • one with yj forced to 1 compute the same value for zk when x  ODCjk

18. Transitive Fan-out Don't Care Computation- 1 • Assume single-output network with tree structure (Note: computation must be made for every output). • Traverse network tree. • At root • DXO is given. • At internal vertices assuming y is the output of x • ODCx = (fy/x)’ + DXOy = (fy|x=1 fy|x=0 )’+ DXOy • Example • Assume DXO = DXOe = 0. • DTb = Eeb= (fe/b)’ = ((b+c)|b=1  (b+c)|b=0)’= c. • DTc = Eec= (fe/c)’ = b. • DTx1 = DTb + (fb/x1)’ = c+a1. • …

19. Observability Don't Care Computation- 2 • General networks have fanout re-convergence. • For each vertex with two (or more) fanout stems • The contribution of the DT along the stems cannot be added. • Wrong assumption is intersecting them • Ea,b=x1+c=x1+a+x4 • Ea,c=x4+b=x4+a+x1 • Ea,b  Ea,c=x1+a+x4 • Variable a is not redundant • Interplay of different paths. • Applying successive flattenings (from PO to PI)

20. Don't Cares for Node j Define the don't care sets DCj for a node j as ODC and SDC illustrated: outputs ODC Fj Boolean network S C D inputs

21. F 1 F 2 X X 1 2 Example • F1= y’2 • F2= x1 x2 • Considering DX1 = x1 and DX2 = x2 • D2 = DI2 + (DX1+ DT12) (DX2+ DT22) (note that DI2, DT12 and DT22 are empty) • D2 = x1x2 , therefore F2= x1+ x2 • Let’s observe that: • (before) D1 = y2(x1x2+x’1x’2)+y’2(x1x’2+x’1x2)+x1 • (after) D1 = y2(x’1x’2)+y’2(x1+x2)+x1 • D1(before)  D1(after)  Fk minimization is not invariant w.r.t. the minimization of Fj, for j  k

22. Network Minimization- 1 Theorem: Be  and ’, where =’except for Fj which was changed to F’j. Therefore, ’iff for every wBn+m, either: a) Fj (w)= F’j (w), or b) w Dj Corolary: Dj is the representation for the don’t care set djof the incompletely specified function (fj, dj, rj).

23. Network Minimization- 2 • INITIALIZE VISITATION INDEXES • COMPUTE INDIVIDUAL DVIs • LOOP: • SELECT THE DON’T CARE SETS DAj=(DIAj + DOj) • Fj ESPRESSO_II (Fj, DAj) • SIMPLIFY_(F’, F) • RECOMPUTE DVIj  yjF’j+y’jyjFj • FLATTEN (j,F)

24. Synthesis and Testability • Testability • Ease of testing a circuit. • Assumptions • Combinational circuit. • Single or multiple stuck-at faults. • Full testability • Possible to generate test set for all faults. • Synergy between synthesis and testing. • Testable networks correlate to small-area networks. • Don't care conditions play a major role.