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Design of 3.67 GHz RF Power Amplifier

Design of 3.67 GHz RF Power Amplifier. Presenters: Akshay Iyer, Logan Woodcock Advisers: Dr. K. Koh, Yahya Mortazavi. Cognitive Radios. Software defined radio Programmed to run by maximizing utility of radio frequency spectrum. Project Goal.

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Design of 3.67 GHz RF Power Amplifier

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  1. Design of 3.67 GHz RF Power Amplifier Presenters: Akshay Iyer, Logan Woodcock Advisers: Dr. K. Koh, Yahya Mortazavi

  2. Cognitive Radios • Software defined radio • Programmed to run by maximizing utility of radio frequency spectrum

  3. Project Goal • Design and simulate an RF power amplifier that operates between 2 and 4 GHz • Use ADS software for design and simulation PA Digital Baseband Processor Digital to Analog Converter Modulator Antenna (Tx) Receiver (Rx) Frequency Synthesizer (Oscillator)

  4. RF Power Amplifier (PA) • Tx side: Increases the signal amplitude to make it more easily detected Gate Source Voltage Input Matching Network Source RF In MOSFET Transistor Output Matching Network RF Out Load Drain Source Voltage

  5. Metal-Oxide Semiconductor Field-Effect Transistor • Creates a channel underneath the gate that connects the source and drain terminals • Channel is created when a large enough voltage is supplied to the gate

  6. Smith Charts Used for Impedance Matching (Max Power Transfer)

  7. Input Impedance Transmission Line Theory Special Cases: Open/Short Circuit Stubs

  8. Amplifier Classes • A, AB, B, C, F • Phase angles

  9. “Load Line” “Q - Point” - DC Operating Point DC+AC conditions: Vds=Vdd+Vac (time average of Vds must be Vdd) Vac=Vout Id=Iddc+Idac Idac=-Iload=-Vout/RL

  10. Final Schematic • Consists of two bias networks, two impedance matching networks, and a MOSFET designed by Freescale.

  11. Transistor and Substrate • Freescale Model MRF8S26060H • Rogers Substrate

  12. Load Line / FET Curves Results • Class AB • utilizes harmonics • VDS of 50 V, VGS of 2 V

  13. Power Results • Max Power Added Efficiency (PAE) of 88%

  14. Bias Networks • Necessary to bias the transistor to desired level

  15. Load-Pull • Shows impedance values specific to schematic

  16. Impedance Matching Networks 1. Shunt 2. Series Electrical Length (degrees)

  17. Harmonic Balance Simulation • Shows the effects of harmonics on output power • Increases efficiency

  18. Scattering - Parameters • Voltage reflection coefficients • Shows reflected voltage (return loss)

  19. Further Steps in the Process - Layout - EM simulation - Foundry mwrf.com

  20. References G. Saggio, Principles of analog electronics, Edition of book, Boca Raton: Taylor & Francis Group, 2014, p. . B. Razavi, RF microelectronics, 2nd ed., New Delhi: Dorling Kindersley India, 2012, p. 767-847.

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