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Chapter 5

Chapter 5. Boolean Algebra and Reduction Techniques. 1. Objectives. You should be able to: Write Boolean equations for combinational logic applications. Use Boolean algebra laws and rules to simplify combinational logic circuits.

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Chapter 5

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  1. Chapter 5 Boolean Algebra and Reduction Techniques 1

  2. Objectives • You should be able to: • Write Boolean equations for combinational logic applications. • Use Boolean algebra laws and rules to simplify combinational logic circuits. • Apply DeMorgan’s theorem to complex Boolean equations to arrive at simplified equivalent equations. 2

  3. Objectives • You should be able to: • Design single-gate logic circuits by using the universal capability of NAND and NOR gates. • Troubleshoot combinational logic circuits. • Implement sum-of-products expressions using AND-OR-INVERT gates. 3

  4. Objectives • You should be able to: • Use the Karnaugh mapping procedure to systematically reduce complex Boolean equations to their simplest form. • Describe the steps involved in solving a complete system design application. 4

  5. Combinational Logic • Using two or more logic gates to form a more useful, complex function • A combination of logic functions B = KD + HD • Boolean Reduction B = D(K+H) 5

  6. Discussion Point • Write the Boolean equation for the circuit below: 6

  7. Boolean Laws and Rules • Commutative law of addition and multiplication • A + B = B + A • ABC = BCA Figures 5-7 and 5-8 7

  8. Boolean Laws and Rules • Associative law of addition and multiplication • A + (B + C) = (A + B) + C • A(BC) = (AB)C Figures 5-9 and 5-10 8

  9. Boolean Laws and Rules • Distributive law • A(B + C) = AB + AC • (A + B)(C + D) = AC + AD + BC + BD Figures 5-11 and 5-12 9

  10. Boolean Laws and Rules • Rule 1: Anything ANDed with a 0 is equal to 0 • Rule 2: Anything ANDed with a 1 is equal to itself • Figure 5-14 10

  11. Boolean Laws and Rules • Rule 3: Anything ORed with a 0 is equal to itself • Figure 5-15 • Rule 4: Anything ORed with a 1 is equal to 1 • Figure 5-16 11

  12. Boolean Laws and Rules • Rule 5: Anything ANDed with itself is equal to itself • Figure 5-17 • Rule 6: Anything ORed with itself is equal to itself • Figure 5-18 12

  13. Boolean Laws and Rules • Rule 7: Anything ANDed with its own complement equals 0 • Figure 5-19 • Rule 8: Anything ORed with its own complement equals 1 • Figure 5-20 13

  14. Boolean Laws and Rules • Rule 9: Anything complemented twice will return to its original logic level • Figure 5-21 14

  15. Boolean Laws and Rules • Rule 10: • A + AB = A + B • A + AB = A + B See Table 5-1 in your text 15

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  17. Discussion Point • Which Boolean laws are illustrated below? • B + (D + E) = (B + D) + E • AB = BA • A + B + C = B + C + A • A(C + D) = AC + AD • What are some strategies for remembering the 10 Boolean rules? 17

  18. Simplification of Combinational Logic Circuits Using Boolean Algebra • Equivalent circuits can be formed with fewer gates • Cost is reduced • Reliability is improved • Use laws and rules of Boolean Algebra 18

  19. Simplification of Combinational Logic Circuits Using Boolean Algebra • Simplify the logic circuit shown by using the appropriate laws and rules. 19

  20. Simplification of Combinational Logic Circuits Using Boolean Algebra • Simplify the logic circuit shown by using the appropriate laws and rules. 20

  21. DeMorgan’s Theorem • To simplify circuits containing NAND and NOR gates • A B = A + B • A + B = A B 21

  22. DeMorgan’s Theorem • Break the bar over the variables and change the sign between them • Inversion bubbles - used instead of inverters to show inversion. • Use parentheses to maintain proper groupings • Results in Sum-of-Products (SOP) form • Use of the MultiSIM logic converter 22

  23. DeMorgan’s Theorem • Bubble Pushing • Figure 5-46 23

  24. DeMorgan’s Theorem • Bubble Pushing • shortcut method of forming equivalent gates • change the logic gate • (AND to OR or OR to AND) • Add bubbles to the inputs and outputs where there were none and remove original bubbles 24

  25. The Universal Capability of NAND and NOR Gates • The NAND as an inverter. • Figure 5-49(a) 25

  26. The Universal Capability of NAND and NOR Gates • Forming an AND with two NANDs • Figure 5-49(b) 26

  27. The Universal Capability of NAND and NOR Gates • Forming an OR with three NANDs • Figure 5-53 27

  28. The Universal Capability of NAND and NOR Gates • Forming a NOR with three NANDs • Figure 5-54 28

  29. Discussion Point • The technique used to form all gates from NANDs can also be used with NOR gates. • Here is an inverter – Figure 5-55 • Form the other logic gates using only NORs. 29

  30. AND-OR-INVERT Gates for Implementing Sum-of-Products Expressions • Product-of-sums (POS) form • Sum-of-products (SOP) form • Can easily be implemented using an AOI gate • Programmable Logic Devices (PLDs) • Can also be used 30

  31. Karnaugh Mapping • To minimize the number of gates • Reduce circuit cost • Reduce physical size • Reduce gate failures • Requires SOP form 31

  32. Karnaugh Mapping • Graphically shows output level for all possible input combinations • Moving from one cell to an adjacent cell, only one variable changes 32

  33. Karnaugh Mapping • Steps for K-map reduction: • Transform the Boolean equation into SOP form • Fill in the appropriate cells of the K-map • Encircle adjacent cells in groups of 2, 4 or 8 • watch for the wraparound • Find terms by determining which variables remain constant within circles 33

  34. Discussion Point • Use a K-map to simplify the circuit. 34

  35. System Design Applications • Use Karnaugh Mapping to reduce equations • Use AND-OR-INVERT gates to implement logic 35

  36. System Design Applications • Use a K-map to simplify a circuit that will use an AOI and inverters to output a HIGH when a 4 bit hexadecimal input is an odd number from 0 to 9 36

  37. CPLD Design Applications • Used to simulate combinations of inputs and observe the resulting output to check for proper design operation. • See CPLD Applications 5-1 and 5-2 37

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  40. Figures 5-80 and 5-81 40

  41. Summary • Several logic gates can be connected together to form combinational logic. • There are several Boolean laws and rules that provide the means to form equivalent circuits. • Boolean algebra is used to reduce logic circuits to simpler equivalent circuits that function identically to the original circuit. 41

  42. Summary • DeMorgan’s theorem is required in the reduction process whenever inversion bars cover more than one variable in the original Boolean equation. • NAND and NOR gates are sometimes referred to as universal gates, because they can be used to form any of the other gates. 42

  43. Summary • AND-OR-INVERT (AOI) gates are often used to implement sum-of-products (SOP) equations • Karnaugh mapping provides a systematic method of reducing logic circuits. 43

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