1. Main Memory -Victor Frandsen

2. Overview • Types of Memory • The CPU & Main Memory • Types of RAM • Properties of DRAM • Types of DRAM & Enhanced DRAM • Error Detection & Correction

3. Types of Memory • Registers • Cache • Main Memory • Secondary Storage (Disks) • Off-line Storage (Tape)

4. Types of Memory } • Registers • Cache • Main Memory • Secondary Storage (Disks) • Off-line Storage (Tape) Random Access Memory

5. Random Access Memory • “Random” – all information can be accessed in the same amount of time. Types of RAM • Static RAM (SRAM) • Dynamic RAM (DRAM)

6. Properties of DRAM • A DRAM cell stores each bit on a capacitor. • DRAM are susceptible to premature discharging.

7. The CPU & Main Memory • The CPU communicates with Main Memory through the Memory Controller located in the North Bridge of the Chipset.

8. Types of DRAM • DRAM is commercially available variety of standards. Two of the most common are: • Dual in-line Memory Module (DIMM) • Memory chips & electrical contacts on both sides. • Single in-line Memory Module (SIMM) • Memory chips & electrical contacts on only one side.

9. DRAM • A single memory module consists of many DRAM chips. • Each DRAM chip consists of supercells organized in a Rectangular Array. • Each supercell contains a certain number of individual DRAM cells or bits. • A chip of 16 supercells, each with 8 bits, is a 16 x 8 DRAM chip. That chip holds 128 bits.

10. DRAM • To access a supercell a signal is sent from the Memory Controller specifying a row. • That row is loaded into an Internal Row Buffer. • A subsequent signal is sent specifying a column. • The information of that supercell is sent to the Memory Controller.

11. DRAM • A SIMM or DIMM with 8 2^23 x 8 DRAM chips is a 64MB module. • To access a 64-bit doubleword, the controller converts a memory address into a supercell coordinates (i,j). • That coordinates is sent to the 8 DRAM chips and each corresponding supercell of row i and col j is returned to the controller which forms the 64-bit doubleword.

12. Enhanced DRAM • Fast Page Mode DRAM & Extended Data Out DRAM (FPM DRAM & EDO DRAM) • Synchronous DRAM (SDRAM) • Double Data Rate SDRAM (DDR DRAM) • DDR2 SDRAM • Rambus DRAM (RDRAM)

13. Error Detection • Parity bits are used for error detection. • RAM with parity bits have an extra bit per byte. • RAM can use either Odd Parity or Even Parity. • An Even Parity chip turns the parity bit to 0 when the sum of all the 1’s in the byte are even.

14. Error Correction Codes • Parity bits can not correct an error. • Error correction codes such as a Hamming Code can detect and correct single bit errors.

15. Sources • Computer Architecture and Organization: An Integrated Approach Miles Murdocca & Vincent Heuring • Computer Systems: A Programmers Perspective Randal E. Bryant & David R. O’Hallaron • Howstuffworks.com/ram.htm