Power Supply Aware Computing

1. Power Supply Aware Computing Pradeep S. Shenoy and Philip T. Krein Support provided by National Science Foundation under Grant ECS 06-21643 and by the Grainger Center for Electric Machinery and Electromechanics. Special thanks to V. Bora and M. Sweeney for their assistance in this work.

2. Microprocessor Supply Requirements • Low voltage, high current • Large load (current) steps • Tight voltage band • Desire high supply efficiency over a wide load range Intel VRM/EVRD Design Guidelines

3. Microprocessor Voltage Regulator • During a load transient, the capacitor must provide the difference between iL and iload→ output voltage deviates • Large output capacitance • Slew rate limited by the inductor → low inductance Buck Converter (voltage regulator) Inductor and capacitor state equation In steady state

4. Minimum Time Control • Also called time optimal control • Minimum time physically possible to move from one operating point to another • One switch action • Fixed converter topology Minimum time response to load step increase

5. Augmented Buck Converter Buck converter augmented with additional energy paths Load transient response of an augmented buck converter

6. Microprocessor Informs Power Supply • Basic information • VID (Vdd reference) • Status indicators • Load step information • Timing • Size • Improving performance decreases output capacitance needs An example of information provided to the power supply

7. Power Supply Informs Microprocessor • Microprocessor activity level determined by power supply state • Request increase or decrease load level • Eliminate voltage fluctuations • Reduce energy consumption, cost, size, etc. An example of information provided to the microprocessor

8. Other Considerations • Communication overhead • Processor pins • Protocol • Sampling rate • Accuracy of information • Impact on computational speed? • Error resilience? Augmented buck converter

9. Experimental Results 12 V input, 5 V output, 60% load steps Idd Iauglow Iaughi Vdd Vdd IL IL Augmented buck converter voltage regulation Expanded load step down in an augmented buck converter

10. Comparison for Load Step Down 12 V input, 5 V output, 60% load step Vdd IL Idd Iauglow Vdd IL Idd Augmented buck converter response Traditional buck converter with minimum time control

11. Conclusions • Challenging performance specs for voltage regulators • Power supply and microprocessor can communicate • Communication and computational overhead • Potential savings in energy, cost, and size Questions or comments?

12. Ideal Sources Ideal voltage source Ideal current source Fixed voltage, any current, Infinite bandwidth Fixed current, any voltage Infinite bandwidth

13. Minimum Time Control • Also called time optimal control • Minimum time physically possible for converter states to move from one operating point to another • One switch action • Fixed converter topology IL (2 A/div) Vout (200 mV/div) Iload (2 A/div) X Axis: Vout (100 mV/div) Y Axis: IL (1 A/div) State plane representation

14. Augmented Buck Converter • Desire an ideal voltage source – fixed voltage, any current • Add energy paths that can supply or sink energy during a change in the load (not in steady state) • Capacitor current remains zero; output voltage constant Augmented Buck Converter Energy can be added or removed in augmentation branches

15. Load Transient Response Time domain response to load step at t1, augmented converter reaches steady state at t2, minimum time control reaches steady state at t3 State plane trajectories with minimum time control and converter augmentation