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FRC FPGA Architecture

FRC FPGA Architecture. Kickoff 2009. Agenda. FRC Robot Controller Architecture FPGA Features and Use Cases Break WPILib for LabVIEW Break WPILib for C / C++. cRIO Architecture. NI 9201 Architecture 8 Channel Analog Input Module. NI 9201.

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FRC FPGA Architecture

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  1. FRC FPGA Architecture Kickoff 2009

  2. Agenda • FRC Robot Controller Architecture • FPGA Features and Use Cases • Break • WPILib for LabVIEW • Break • WPILib for C / C++

  3. cRIO Architecture

  4. NI 9201 Architecture8 Channel Analog Input Module NI 9201

  5. NI 9403 Architecture 32-Channel Bidirectional Digital I/O Module NI 9403 Digital Breakout

  6. NI 9472 Architecture NI 9472

  7. FRC FPGA Subsystems • Analog Input • Oversample / Average • Accumulator • Analog Trigger • Digital Input / Output • Slow Digital Output • Hobby PWM Output • I2C Bus • Digital Input Filtering • Solenoid Output • Watchdog • Counter / Timer • SPI Engine • Time / Alarm • Routable Interrupt • Direct Memory Access

  8. Analog InputUse Case • Angle of a Potentiometer • Distance of a Maxbotics Ultrasonic Sensor • Acceleration of an Accelerometer Axis • Any other Very Low Frequency Analog Signal

  9. Analog Input • 12-bit ADC with +/-10V Range • Access Factory Calibration • Variable-Length Scan List • 8 maximum • Repeat entries allowed • Scan Rate • Per module basis (one ADC) • 2us per Conversion Minimum i.e. 500kS/s with single entry scan list

  10. Analog Input Sources • Raw Samples • 16-bit • Updated After Each Conversion • Oversample / Average Engine Output • 32-bit • Windowed Register Access • Most recent sample

  11. FRC FPGA Subsystems • Analog Input • Oversample / Average • Accumulator • Analog Trigger • Digital Input / Output • Slow Digital Output • Hobby PWM Output • I2C Bus • Digital Input Filtering • Solenoid Output • Watchdog • Counter / Timer • SPI Engine • Time / Alarm • Routable Interrupt • Direct Memory Access

  12. Oversample / Average Engine (OAE)Use Case • Oversample • Higher Resolution Samples • Lower Sample Rate • Average • Same Resolution Samples • Lower Sample Rate • More Stable Sample Values

  13. Oversample / Average Engine (OAE) • Specified in bits • Bbits: 2B== N Samples • 15 bits Each Maximum • Oversample • Sums NO samples • Average • Sums NA samples • Divide by NA • Output changes after NOxNA Samples

  14. FRC FPGA Subsystems • Analog Input • Oversample / Average • Accumulator • Analog Trigger • Digital Input / Output • Slow Digital Output • Hobby PWM Output • I2C Bus • Digital Input Filtering • Solenoid Output • Watchdog • Counter / Timer • SPI Engine • Time / Alarm • Routable Interrupt • Direct Memory Access

  15. Accumulator Use case • Hardware Numerical Integration • Gyro • Integrate: Angular Rate  Angle

  16. Accumulator • 64-bit Value / 32-bit Count • 2 available • Hardwired to Slot 1, AI 1 and AI 2 OAE Output • Center Value • Deadband • Value Reset to Zero

  17. FRC FPGA Subsystems • Analog Input • Oversample / Average • Accumulator • Analog Trigger • Digital Input / Output • Slow Digital Output • Hobby PWM Output • I2C Bus • Digital Input Filtering • Solenoid Output • Watchdog • Counter / Timer • SPI Engine • Time / Alarm • Routable Interrupt • Direct Memory Access

  18. Analog Trigger Use case • Reflective Sensor Encoder • Interrupt at Pot Value • Sin-Cos Signal to Quadrature • Variable Reluctance Sensor • Any Analog Signal to Digital

  19. Analog Trigger • Trigger Events From Analog Signal • Specify Upper and Lower Limit • Source Raw or OAE • Trigger State • High when Above Upper Limit • Low when Below Lower Limit • Unchanged when Between Limits (Hysteresis) • In Window • Voltage between Upper and Lower Limit

  20. Analog Trigger

  21. Analog Trigger – Hysteresis

  22. Analog Trigger – Hysteresis (Too Noisy)

  23. Analog Trigger - Rollover DetectionUse case • Count Rollovers (Rotations) • Continuous-Turn Potentiometers • Magnetic Absolute Encoder • Any Signal that Rolls Over

  24. Analog Trigger - Rollover Detection • Jump Over Window • Floating • Large Change in Value • Average-Rejection Filter • 3 Point Filter • Pulse Output • Rising and Falling Pulses • Cannot Read via Register; Routable Only

  25. Analog Trigger – Rollover Detection Rising Trigger

  26. Analog Trigger – Rollover Detection Rising Trigger, Low-Pass Filtered

  27. Average Rejection Filter Use case • Averaging Inherent in Sampling Process • Perform More Averaging After Sampling • Changes the Effective Sample Rate • Increases the Effect of the Filter • Balance Effective Sample Rate • Too Fast, the Filter Has Too Little Effect • Too Slow, Trigger False Positives • True Slope Needs at least One Sample In Window

  28. Average Rejection Filter

  29. Analog Trigger – Rollover Detection Rising Trigger, Average Rejection

  30. FRC FPGA Subsystems • Analog Input • Oversample / Average • Accumulator • Analog Trigger • Digital Input / Output • Slow Digital Output • Hobby PWM Output • I2C Bus • Digital Input Filtering • Solenoid Output • Watchdog • Counter / Timer • SPI Engine • Time / Alarm • Routable Interrupt • Direct Memory Access

  31. Digital Input / OutputUse case • Digital Input • Limit Switches • Digital Output • Jaguar Coast / Brake Control • Pulse Generator • Ping Signal for Ultrasonic Sensors

  32. Digital Input / Output • 6.525us Per Sample • Output Enable (Change) • 17us Delay for I/O on Both NI 9403 Modules • Output Latch Configurable Before OE • Output Pulse Generator • Invert Bits For Some Time Then Reset • 1.6ms Maximum

  33. FRC FPGA Subsystems • Analog Input • Oversample / Average • Accumulator • Analog Trigger • Digital Input / Output • Slow Digital Output • Hobby PWM Output • I2C Bus • Digital Input Filtering • Solenoid Output • Watchdog • Counter / Timer • SPI Engine • Time / Alarm • Routable Interrupt • Direct Memory Access

  34. Slow Digital OutputUse case • Spike Relay Control • Robot Signal Light • Controlled by Network Status Code • Not Available • 4 Outputs on I2C Header • Any Custom Circuits that need More Outputs

  35. Slow Digital Output • SPI Output to Sidecar Shift Registers • 320us Per Update • Spike Relay Control • Gated by Watchdog • Robot Signal Light • 4 Outputs on I2C Header

  36. FRC FPGA Subsystems • Analog Input • Oversample / Average • Accumulator • Analog Trigger • Digital Input / Output • Slow Digital Output • Hobby PWM Output • I2C Bus • Digital Input Filtering • Solenoid Output • Watchdog • Counter / Timer • SPI Engine • Time / Alarm • Routable Interrupt • Direct Memory Access

  37. Hobby PWM OutputUse case • Jaguar Motor Controller • 1x Period Multiplier • 5ms Update • Victor Motor Controller • 2x Period Multiplier • 10ms Update • Hobby Servo • 4x Period Multiplier • 20ms Update

  38. Hobby PWM Output • 8-bit Generator • 0 == Disable Output • 1 == 0.65ms High • 128 == 1.5ms High • 255 == 2.35ms High • Period Multiplier • 1x, 2x, or 4x • Gated by Watchdog

  39. FRC FPGA Subsystems • Analog Input • Oversample / Average • Accumulator • Analog Trigger • Digital Input / Output • Slow Digital Output • Hobby PWM Output • I2C Bus • Digital Input Filtering • Solenoid Output • Watchdog • Counter / Timer • SPI Engine • Time / Alarm • Routable Interrupt • Direct Memory Access

  40. I2C BusUse case • Hitechnic NXT Compatible Sensors • Compass • 3 Axis Accelerometer • Gyro (No Hardware Integration) • Devantech Sensors • SRF08 Ultrasonic Range Finder • Compass • Any Other I2C Compliant Sensors

  41. I2C Bus • Address / Register / Data Transaction Format • Independent Bus Per Module • 7-Bit Addresses Only • Write 1 Byte Per Transaction • Read 1, 2, 3, or 4 Bytes Per Transaction • Clock Skewing Only On Read Between Data Bytes • Slave Acknowledge Ignored • Interrupt on Done

  42. FRC FPGA Subsystems • Analog Input • Oversample / Average • Accumulator • Analog Trigger • Digital Input / Output • Slow Digital Output • Hobby PWM Output • I2C Bus • Digital Input Filtering • Solenoid Output • Watchdog • Counter / Timer • SPI Engine • Time / Alarm • Routable Interrupt • Direct Memory Access

  43. Digital Input FilteringUse case • Debounce Buttons • Synchronize Digital Input Signals • Filter Out High Frequency Noise

  44. Digital Input Filtering • 3 Filters Per Module • Filter Assigned Per Channel • Correlation Between Channels • Updates at End of Correlation Period • Unchanged if Input Changed During Period • All Routed Digital Inputs Can Be Filtered

  45. FRC FPGA Subsystems • Analog Input • Oversample / Average • Accumulator • Analog Trigger • Digital Input / Output • Slow Digital Output • Hobby PWM Output • I2C Bus • Digital Input Filtering • Solenoid Output • Watchdog • Counter / Timer • SPI Engine • Time / Alarm • Routable Interrupt • Direct Memory Access

  46. Solenoid OutputUse case • Control Pneumatic Solenoids • Less Space Than 4 Spikes

  47. Solenoid Output • Pass-through • Gated by Watchdog

  48. FRC FPGA Subsystems • Analog Input • Oversample / Average • Accumulator • Analog Trigger • Digital Input / Output • Slow Digital Output • Hobby PWM Output • I2C Bus • Digital Input Filtering • Solenoid Output • Watchdog • Counter / Timer • SPI Engine • Time / Alarm • Routable Interrupt • Direct Memory Access

  49. WatchdogUse case • Ensure That Critical Code Keeps Running • Added Safety if Used Correctly • Not Mandatory; Strongly Recommended • Disable to Keep Motors Running At Breakpoint

  50. Watchdog • Disables Actuator Outputs • Configurable Timeout • Feed To Keep Alive • Manual Kill • Disable Outputs Now • Immortal Mode • Timeout and Manual Kill Ignored • Outputs Enabled

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