1 / 18

A Reconfigurable FPGA Architecture for DSP Transforms

A Reconfigurable FPGA Architecture for DSP Transforms. Subramanian Rama Vishnu Vijayaraghavan. OUTLINE. Motivation Reconfigurable FPGA’s DSP Transforms, Breakdown & Applications Communication Graphs& Proposed Architecture Imaginary Radix Complex Multiplication Accomplished Work

jaymiller
Télécharger la présentation

A Reconfigurable FPGA Architecture for DSP Transforms

An Image/Link below is provided (as is) to download presentation Download Policy: Content on the Website is provided to you AS IS for your information and personal use and may not be sold / licensed / shared on other websites without getting consent from its author. Content is provided to you AS IS for your information and personal use only. Download presentation by click this link. While downloading, if for some reason you are not able to download a presentation, the publisher may have deleted the file from their server. During download, if you can't get a presentation, the file might be deleted by the publisher.

E N D

Presentation Transcript

  1. A Reconfigurable FPGA Architecture for DSP Transforms Subramanian Rama Vishnu Vijayaraghavan

  2. OUTLINE • Motivation • Reconfigurable FPGA’s • DSP Transforms, Breakdown & Applications • Communication Graphs& Proposed Architecture • Imaginary Radix Complex Multiplication • Accomplished Work • Conclusion

  3. Motivation • Dedicated VLSI Architectures for Orthogonal Transforms – FFT, DCT, Convolution, Correlation • Dedicated VLSI Architectures for Non- Orthogonal Transforms – Gabor, Wavelet • Not many Architectures for Both – Current Day Applications like Handhelds, Mobile Phones, etc. require such DSP capabilities

  4. Need for Reconfigurable Architecture • Multiple Orthogonal & Non-Orthogonal Transforms can be broken down to a basic set of Building blocks (DCT,DST, multipliers and Adders) • Handheld devices don’t require much Multiprocessing – No need to waste hardware • Increased Fault-Tolerance By Reconfiguration and Redundancy

  5. BATTERY (40+ lbs) AREA & POWER • INCREASING PROMINENCE OF PORTABLE SYSTEMS • Cell Phones • Personal Digital Assistants • Tablet PC’s • Need for Low Power & Area • Battery Technology not kept pace with Semiconductor Technology

  6. DISCRETE FOURIER TRANSFORM Traditional DFT Breakdown of 1D DFT Breakdown of 2D DFT APPLICATIONS: • Image Processing • Orthogonal Frequency Division Multiplexing

  7. Discrete Gabor Transform Gabor Transform and Coefficients Breakdown Applications • Speech Processing / Voice Recognition • Image Compression

  8. Discrete Convolution Applications • Image Manipulation • Sound Processing

  9. 2-D Fourier Transform

  10. Convolution Operation

  11. Convolution Operation (Contd.) Computational complexity: 2 DCT, 2 DST,4 real multiplications and 2 real additions

  12. Imaginary Radix Representation • A imaginary number system, Donald Knuth, Communications of the ACM • Concept: a + ib = A – Interleave both real and Imaginary parts • # of multiplications get reduced to one • Preserve Interleaving even during multiplication • Requires slight modifications in multiplier design (one reason for migrating to FPGA)

  13. Convolution Operation (using Complex Representation) Computational complexity: 2 DCT, 2 DST,1 complex multiplication (same as real multiplication methodology)

  14. Convolution using Complex Representation - Communication Graph

  15. Gabor Transform Communication Graph

  16. Reconfiguration

  17. Work so far • Design & Synthesis of Basic Building Blocks • DCT • DST • Parallel Array Multiplier • Reconfiguration Unit • Partial Integration • Work to be done: • Complete Integration • Functional Correctness Check

  18. CONCLUSION Need for multiple transforms on same chip • Mobile devices, Handhelds • Not much multiprocessing required Use of Reconfigurable FPGA’s • Reduces • AREA • Increases • Functionality • Fault Tolerance

More Related