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Reconfigurable DSP Project

Reconfigurable DSP Project. The ChooChoo: Final Design Review System Integration Hardware School of Electrical and Computer Engineering Georgia Institute of Technology. MPEG II Decoder. Team Members. Theodore Harvey Jacques Fournier Jascha Freess Jeff Hildreth Wenzhong Gao

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Reconfigurable DSP Project

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  1. Reconfigurable DSP Project The ChooChoo: Final Design Review System Integration Hardware School of Electrical and Computer Engineering Georgia Institute of Technology MPEG II Decoder FDR--ECE6276 Class Project 12/06/00

  2. Team Members • Theodore Harvey • Jacques Fournier • Jascha Freess • Jeff Hildreth • Wenzhong Gao • Willmert Pereyra Speaker: Jacques Fournier FDR--ECE6276 Class Project 12/06/00

  3. Outline • Order of Presentations • Web Page Demonstration • Co-Design Flow • Software Design Flow • Architecture Types • Test Results • Conclusions • Other Presentations Speaker: Jacques Fournier FDR--ECE6276 Class Project 12/06/00

  4. Presentation Order • System Integration Hardware Team • Algorithm Team • Architecture Team • Instruction Set Team • Data Path I Team • Decoder Team • Data Path II Team • System Integration Software Team Speaker: Jacques Fournier FDR--ECE6276 Class Project 12/06/00

  5. Web Page Demonstration • System Integration Hardware • Algorithm • Architecture • Instruction Set • Data Path I • Decoder • Data Path II • System Integration Software Speakers: Jascha Freess and Jeff Hildreth FDR--ECE6276 Class Project 12/06/00

  6. Co-Design Flow Speaker: Willmert Pereyra FDR--ECE6276 Class Project 12/06/00

  7. Software Design Flow Speaker: Willmert Pereyra FDR--ECE6276 Class Project 12/06/00

  8. Architecture Types Bus/Pipeline Massively Parallel Parallel Speaker: Willmert Pereyra FDR--ECE6276 Class Project 12/06/00

  9. RDG Massively Parallel Speaker: Willmert Pereyra FDR--ECE6276 Class Project 12/06/00

  10. Serial Interface Unit Speaker: Willmert Pereyra FDR--ECE6276 Class Project 12/06/00

  11. PM .mif File: P1_inst.mif 09: 00C10000; -- LD R6, R1, D#0%: 0A: 50463800; -- MLT R2,R6,R7 0B: 44E44000; -- ADD R7,R4,R8 0C: 4400F000; -- ADD R0,R0,R30 0D: 211E001E; -- ST R8,R30,D#30%: 0E: 40210001; -- ADDI R1,R1,D#1%: 0F: 01210000; -- LD R9, R1, D#0%: 10: 50495000; -- MLT R2,R9,R10 11: 448A5800; -- ADD R4,R10,R11 12: 43DE0001; -- ADDI R30,R30,D#1%: 13: 217E001E; -- ST R11,R30,D#30%; 14: 40030001 ; -- ADDI R0, R3, #1 15: 48032000 ; -- SUBR R0, R3, R4 16: 40030001 ; -- ADDI R0, R3, #1 17: 20640000 ; -- ST R3, R4, #0 END ; DEPTH = 64; WIDTH = 32; ADDRESS_RADIX = HEX; DATA_RADIX = HEX; CONTENT BEGIN [0..3F] : 11111111111111111111111111111111; 00: 44000800; -- ADD R0,R0,R1 01: 00410000; -- LD R2,R1,D#0%: 02: 40210001; -- ADDI R1,R1,D#1%: 03: 00610000; -- LD R3,R1,D#0%: 04: 44432000; -- ADD R2,R3,R4 05: 40210001; -- ADDI R1,R1,D#1%: 06: 00A10000; -- LD R5, R1, D#0%: 07: 50852000; -- MLT R4,R5,R4 08: 40210001; -- ADDI R1,R1,D#1%: 09: 00C10000; -- LD R6, R1, D#0%: 0A: 50463800; -- MLT R2,R6,R7 0B: 44E44000; -- ADD R7,R4,R8 Speaker: Wenzhong Gao FDR--ECE6276 Class Project 12/06/00

  12. PM .mif File:P2_inst.mif DEPTH = 64; WIDTH = 32; ADDRESS_RADIX = HEX; DATA_RADIX = HEX; CONTENT BEGIN [0..3F] : 11111111111111111111111111111111; 00: 10200030; -- LD R1,R0,D#48%: 01: 10400031; -- LD R2,R0,D#49%: 02: 10600032; -- LD R3,R0,D#50%: 03: 04040010; -- ADDI R0,R4,D#16%: 04: 10A00033; -- LD R5,R0,D#51%: 05: 10C00034; -- LD R6,R0,D#52%: 06: 04070001; -- ADDI R0,R7,D#1%: 07: 20A70015; -- BNE R5,R7,D#21%: 08: 11010000; -- LD R8,R1,D#0%: 09: 11200035; -- LD R9,R0,D#53%: 0A: 0D095000; -- MLT R8,R9,R10 0B: 19430000; -- ST R10,R3,D#0%: 0C: 08872000; -- SUBR R4,R7,R4 0D: 04210001; -- ADDI R1,R1,D#1%: 0E: 04420001; -- ADDI R2,R2,D#1%: 0F: 04630001; -- ADDI R3,R3,D#1%: 10: 11010000; -- LD R8,R1,D#0%: 11: 11220000; -- LD R9,R2,D#0%: 12: 0D094000; -- MLT R8,R9,R8 13: 0D064000; -- MLT R8,R6,R8 14: 040B0004; -- ADDI R0,R11,D#4%: 15: 2D0B6000; -- SRA R8,R11,R12 16: 19830000; -- ST R12,R3,D#0%: 17: 04210001; -- ADDI R1,R1,D#1%: 18: 04420001; -- ADDI R2,R2,D#1%: 19: 04630001; -- ADDI R3,R3,D#1%: 1A: 08872000; -- SUBR R4,R7,R4 1B: 00000000; -- NOP 1C: 04030001 ; -- ADDI R0, R3, #1 1D: 08032000 ; -- SUBR R0, R3, R4 1E: 04030004 ; -- ADDI R0, R3, #4 1F: 18640000 ; -- ST R3, R4, #0 END ; Speaker: Wenzhong Gao FDR--ECE6276 Class Project 12/06/00

  13. PM .mif File: P3_inst.mif DEPTH = 64; WIDTH = 32; ADDRESS_RADIX = HEX; DATA_RADIX = HEX; CONTENT BEGIN [0..3F] : 00000000; 00: 00200000; -- LD R1,R0,D#0%: 01: 00400001; -- LD R2,R0,D#1%: 02: 00600002; -- LD R3,R0,D#2%: 03: 048000FF; -- LDI R4,H#00FF%: 04: 04A00004; -- LDI R5,D#4%: 05: 05200001; -- LDI R9,D#1%: 06: 2D204800; -- SUBR R9,R0,R9 07: 00C10000; -- LD R6,R1,D#0%: 08: 00E20000; -- LD R7,R2,D#0%: 09: 28C63800; -- ADD R6,R6,R7 0A: 10060001; -- BLT R0,R6,D#1%: 0B: 08030000; -- ST R0,R3,D#0%: 0C: 2CE43000; -- SUBR R7,R4,R6 0D: 08830000; -- ST R4,R3,D#0%: 0E: 10E00001; -- BLT R7,R0,D#1%: 0F: 08C30000; -- ST R6,R3,D#0%: 10: 24210001; -- ADDI R1,R1,D#1%: 11: 24420001; -- ADDI R2,R2,D#1%: 12: 24630001; -- ADDI R3,R3,D#1%: 13: 28A54800; -- ADD R5,R5,R9: --14 BLT R0,R5,H#FFF3%:1005FFF3 14: 00000000; -- NOP 15: 24600001 ; -- ADDI R3, R0, #1 16: 2C830000 ; -- SUBR R4, R3, R0 17: 24600002 ; -- ADDI R3, R0, #2 18 : 08640000 ; -- ST R3, R4, #0 END ; Speaker: Wenzhong Gao FDR--ECE6276 Class Project 12/06/00

  14. DM .mif Files datamem1.mif datamem2.mif Speaker: Wenzhong Gao FDR--ECE6276 Class Project 12/06/00

  15. Test Resutls: P1-P2 Switch Speaker: Wenzhong Gao FDR--ECE6276 Class Project 12/06/00

  16. P3-P2 Switch: Ts = 1.34us Speaker: Wenzhong Gao FDR--ECE6276 Class Project 12/06/00

  17. P2-P1 Switch Speaker: Wenzhong Gao FDR--ECE6276 Class Project 12/06/00

  18. P1-P3 Switch: Completes Cycle Speaker: Wenzhong Gao FDR--ECE6276 Class Project 12/06/00

  19. Suggestions and Improvements • Suggestions and Improvements Speaker: Jascha Freess and Jeff Hildredth FDR--ECE6276 Class Project 12/06/00

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