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ECE 371- Unit 11

ECE 371- Unit 11. Timers and Counters (“Stop Watches and Alarm Clocks”). Port T – Enhanced Capture Timer. 8 Input Capture – Output Compare Pins. “INPUT CAPTURE”. • Used to measure the characteristics of an input signal - Measure the width of an input pulse

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ECE 371- Unit 11

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  1. ECE 371- Unit 11 Timers and Counters (“Stop Watches and Alarm Clocks”)

  2. Port T – Enhanced Capture Timer 8 Input Capture – Output Compare Pins

  3. “INPUT CAPTURE” • Used to measure the characteristics of an input signal - Measure the width of an input pulse - Determine the period or duty cycle of an input signal. Pulse width

  4. “INPUT CAPTURE” • Used to measure the characteristics of an input signal - Measure the width of an input pulse - Determine the period or duty cycle of an input signal. A B Duty Cycle = A/(A + B) * 100%

  5. “OUTPUT COMPARE” • Permits generation of output signals to user specification - Single pulse - Square wave - PWM Signal Single pulse - can control width of pulse and/or delay from trigger signal T1 T2 Trigger

  6. “OUTPUT COMPARE” • Permits generation of output signals to user specification - Single pulse - Square wave - PWM Signal Square wave - can control period. Period

  7. “OUTPUT COMPARE” • Permits generation of output signals to user specification - Single pulse - Square wave - PWM Signal PWM signal- can control duty cycle = T1/ (T1 + T2) T2 T1

  8. Main Components of Timer Module • Free Running 16-Bit Up-Counter • Eight Input/Output Lines (Channels) • Pulse Accumulator System

  9. 16-bit Free Running Counter 2 MHz

  10. INPUT CAPTURE (“Stop Watch”/Signal Analysis) • Captures the Current Count on the Free-Running Counter When a User-Specified Event Occurs on the Channel Pin • Types of “events” - rising edge on channel pin - fall edge on channel pin - rising or falling edge

  11. INPUT CAPTURE When the User-Specified Event Occurs: Current value of free-running counter is latched into the Timer Channel Register. Channel Flag is set. Channel will generate an Interrupt (if the Channel’s Interrupt Enable Bit has been set.)

  12. OUTPUT COMPARE (“Alarm Clock”/Signal Generation) • Causes a change on the channel output pin when the value in the Free-Running Timer matches the value in the Channel Register. Actions that can activated at the channel output pin: • Go high • Go low • Toggle

  13. “Output Compare System for One Channel”

  14. Special Channel for Output Compare: Channel 7 • The state of ALL channel output pins can be affected when value of free-running timer matches the target value of Channel 7. • Two special registers make this possible: - Mask Register (selects which Channels are to be included in this feature. - “Value” Register (indicates what value each included channel is to take on)

  15. Software interacts with Counter/Timer using registers: Main Registers: • Count Register (contains value of free-running counter) • Control Registers (used to select option) • Interrupt Mask Register (used to enable interrupts) • Flags Registers (used to indicate when an interrupt condition has occurred and when free-running counter rolls over) • Input Capture/Output Compare Registers (Alarm Clock/Stop Watch value for each timer) • Input Capture/Output Compare Select Registers (used to specify whether a given channel is to be used as Input Capture or Output Compare.

  16. 16-bit Timer Counter Register (free-running counter) Bus Clock Prescaler PR2,PR1,PR0 16-bit Timer Count Register TCNT TOF

  17. Timer Count Register • Timer Count Register (TCNT) is constantly being incremented • TOF is set when TCNT overflows • Bus Clock Frequency and Prescaler determine the rate of increment

  18. Timer Resolution • 2 Mhz Bus Clock • Prescale=0b000 => 0.5 usec resolution • TOF Set every 32758 usec. • Prescale=0b001 => 1.0 usec resolution • TOF Set every 65536 usec. • Prescale=0b111 => 64 usec resolution • TOF Set every 4.194304 Seconds

  19. TSCR2 Example Code /* Bit 4 – TCRE */ TSCR2 = TSCR2 & 0xF7; // Set TCRE=0 (prevent special channel 7 // from reseting counter) /* Bits 2, 1, 0 – Prescale */ int prescale; // 3-bit prescale value /* Set Prescale Value */ TSCR2 = (TSCR2 & 0xF8) | (0x07 & prescale); /* TSCR2 = xxxx xxxx 0xF8 = 1111 1000 TSCR2&0xF8 = xxxx x000 0x07 = 0000 0111 prescale = yyyy yyyy Prescale&0x7= 0000 0yyy TSCR2 = xxxx xyyy */

  20. TSCR2 Example Code /* Bit 7 – TOI */ TSCR2 = TSCR2 | 0x80; //Set TOI=1 to enable Timer Overflow Interrupts /* TSCR2 = xxxx xxxx 0x80 = 1000 0000 TSCR2|0x80 = 1xxx xxxx */ TSCR2 = TSCR2 & 0x7F; //Set TOI=0 to disable Timer Overflow Interrupts /* TSCR2 = xxxx xxxx 0x7F = 0111 1111 TSCR2&0x7F= 0xxx xxxx */

  21. /* Clear TOF - Timer Overflow Flag */ TFLG2 = 0x80;

  22. TSCR1 = TSCR1 | 0x80; // Enable Timer TSCR1 = TSCR1 & 0x7F; //Disable Timer

  23. Timer Overflow Interrupt Example ---- long unsigned int tnctof = 0; // count timer overflows void tof_isr(void) __attribute__ ((interrupt); // forward reference ----- int main(void) {// initialize timer SETVECT(0xFFDE,tof_isr); // initialize TOF Interrupt vector TSCR1 = TSCR1 |0x80; // Enable timer (TEN = 1) TSCR2= 0x80; // Enable interrupt on overflow, prescaler=0 (TOI=1) TFLG2 = 0x80; // Clear Timer Overflow (TOF=1) ENABLE(); --- --- } void tof_isr(void) { TFLG2 = 0x80; // Clear Timer Overflow Flag (TOF=1) tnctof++; // count number of overflows }

  24. 16-bit Register Per Channel

  25. 16-bit Register Per Channel

  26. Input Capture/Output CompareSelection Register

  27. Example – I/O Selection /* Input Capture/Output Compare Module Selection Timer 7, 6. 3, 1 – Input Capture Timer 5, 4, 2, 0 – Output Compare */ TIOS = 0x35; // 0x35 = 0b00110101 /* Change Timer 6 to Output Compare */ TIOS = TIOS | 0x40; // 0x40 = 0b01000000 /* Change Timer 2 to Input Capture */ TIOS = TIOS & 0xFB; // 0xFB = 0b11111011

  28. Using Channel X for Input Capture Initialization • Set Timer Channel X to Input Capture in the TOS Register • Select Input Edge Capture Control Mode in Timer Control Register 3 or 4 Operation • On selected Edge, TCNT is copied into TCx, Flag is Set Software Action After Flag is Set: • Program reads TCx • Program clears Flag

  29. Timer Control Register

  30. Input Capture Edge Control

  31. Example 1 – Input Capture /* Input Capture/Output Compare Module Selection Timer 1 – Input Capture Timer 1 - Capture on “0” to “1” */ TIOS = TIOS & 0xFD; // Clear Bit 1 – Set Timer 1 for Input /* Let TIOS = xxxx xxxx 0xFD = 1111 1101 TIOS & 0xFD = xxxx xx0x */ TCTL4 = (TCTL4&0xF3) | 0x04; // Use Rising Edge Trigger /* Let TCTL4 = xxxx xxxx 0xF3 = 1111 0011 TCTL4&0xF3 = xxxx 00xx 0x04 = 0000 0100 (TCTL4&0xF3)|0x04 = xxxx 01xx */

  32. TFLG1 = 0x02; // clear Timer 1 Interrupt Flag while((TFLG1&0x02)==0); // Wait for input trigger /* TFLG1 = xxxx xxxx 0x02 = 0000 0010 TFLG1&0x02 = 0000 0010 */ unsigned int time1; time1 = TC1; // Read in time of capture

  33. Example 2 – Input CapturePulse Width Measurement /* Input Capture/Output Compare Module Selection Timer 0 – Alternate between: - Capture on “0” to “1” - Capture on “1” to “0” */ TIOS = TIOS & 0xFE; // Clear Bit 0 – Use Timer 0 as Input /* TIOS = xxxx xxxx 0xFE = 1111 1110 TIOS&0xFE = xxxx xxx0 */ TCTL4 = (TCTL4&0xFC) | 0x01; // Trigger on rising edge TFLG1 = 0x01; // clear Timer 0 Flag while((TFLG1&0x01)==0); // Wait for input trigger on PT1

  34. Example 2 – Pulse Width unsigned int time1, time2, pw; time1 = TC0; // Read time of capture TFLG1 = 0x01; //clear Timer 0 Flag TCTL4 = (TCTL4&0FC) | 0x02; // Change Trigger condition to “falling edge” while((TFLG1&0x01)==0); // Wait for input trigger time2 = TC0; // read time of capture /* 2 Cases – tcnt overflow */ If(time2 > time1) pw = time2 - time1; else pw = 0x10000 + time2 – time1;

  35. Example 2 – PW Calculation PW = 0xC000-0x0100 = 0xBF00 0x0100 0xC000 Case 1 PW = 0x10000 + 0x2000 – 0xD000 = 0x5000 Case 2 0xD000 0x2000 0 1 2 …… 0xFFFF 0 1 2 …. 0xFFFF 0 1 2 ….. TCNT

  36. Timer Interrupt Enable Register

  37. Input Capture ExampleUsing Interrupts /* Use Channel 0 Input Capture to Measure Pulse Width */ --- unsigned int pw=0; void ic0_isr(void) __attribute__ ((interrupt)); // forward reference --- int main() {// init timer, code not shown // init input capture channel 0 TIOS = TIOS & 0xFE; // Set Channel 0 to Input (Clear Bit 0) TCTL4 = (TCTL4&0xFC)| 0x01; // Trigger Channel 0 on rise TFLG1 = 0x01; // Clear Channel 0 Flag TIE = TIE | 0x01; // Enable Channel 0 Interrupt SETVECT(0xFFEE,ic0_isr); // Init Channel 0 Interrupt Vector ENABLE();

  38. Input Capture Using Interrupts pw=0; while(pw==0); // wait for pulse width measurement ----- =pw; // use pulse width pw=0; ----- }

  39. Input Capture Interrupt Example void ic0_isr() {unsigned int temp; if((TCTL4&0x03)==0x01) {// time was rise temp=TC0; TCTL4=(TCTL4&0xFC)|0x2; // set fall TFLG1=0x01; // clear flag--return from this point leaves processing in “while” loop } else // time was fall {if(temp<TC0) pw=TC0-temp; else pw=0x10000+TC0-temp; TCTL4=(TCTL4&0xFC)|0x01; // set rise TFLG1=0x01; // clear flag } }

  40. Output Compare • Set Channel X to Output Compare • TIOS = TIOS | (1<<X); // Set Bit X to “1 • Initialize TCx to Time for Compare • Select Mode

  41. Timer Output Control Register

  42. Timer Output Control Register

  43. Example – Output CompareGenerate Square Wave /* Initialize Output Compare Channel 2 Complement on Each Compare Timer has been initialized */ TIOS = TIOS | 0x04: // Set Channel 2 to Output Compare – Bit 2 TCTL2 = (TCTL2&0xCF) | 0x10; // Toggle Output Line 2 TFLG1 = 0x04; // Clear Channel 2 Flag TC2 = TCNT + T/2; // Complement in T/2 Seconds while(1) { while((TFLG1&0x04)==0); // Wait for Channel 2 flag to go high TC2 = TC2 + T/2; // Complement T/2 from now TFLG1 = 0x04; // Clear Channel 2 Flag }

  44. Square Wave GenerationUsing Interrupts SETVECT(0xFFEA, oc2_isr); // set interrupt vector ---- ---- void oc2_isr(void) {TC2 = TC2 + T/2; // Complement T/2 from now TFLG1 = 0x04; // Clear Channel 2 Flag }

  45. Enhanced Timer Port Definitions #define TIOS _P(0x40) // timer input/output select #define CFORC _P(0x41) // timer compare force #define OC7M _P(0x42) // timer output compare 7 mask #define OC7D _P(0x43) // timer output compare 7 data #define TCNT _LP(0x44) // timer counter register (2 bytes) #define TSCR _P(0x46) // timer system control register #define TTOV _P(0x47) // reserved #define TCTL1 _P(0x48) // timer control register 1 #define TCTL2 _P(0x49) // timer control register 2 #define TCTL3 _P(0x4A) // timer control register 3 #define TCTL4 _P(0x4B) // timer control register 4

  46. Enhanced Timer Port Definitions #define TMSK1 _P(0x4C) // timer interrupt mask 1 (TIE) #define TMSK2 _P(0x4D) // timer interrupt mask 2 (TSCR2) #define TFLG1 _P(0x4E) // timer flags 1 #define TFLG2 _P(0x4F) // timer flags 2 #define TC0 _LP(0x50) // timer capture/compare register 0 #define TC1 _LP(0x52) // timer capture/compare register 1 #define TC2 _LP(0x54) // timer capture/compare register 2 #define TC3 _LP(0x56) // timer capture/compare register 3 #define TC4 _LP(0x58) // timer capture/compare register 4 #define TC5 _LP(0x5A) // timer capture/compare register 5 #define TC6 _LP(0x5C) // timer capture/compare register 6 #define TC7 _LP(0x5E) // timer capture/compare register 7

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