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On-Chip ECC for Low-Power SRAM Design

On-Chip ECC for Low-Power SRAM Design . Hsin-I Liu EE 241 Project 5/9/2005. Outline . Introduction to low-power SRAM Introduction on error correction code Analysis of data retention voltage in SRAM Simulations and results. V 2 (V). Low-Power SRAM .

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On-Chip ECC for Low-Power SRAM Design

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  1. On-Chip ECC for Low-Power SRAM Design Hsin-I Liu EE 241 Project 5/9/2005

  2. Outline • Introduction to low-power SRAM • Introduction on error correction code • Analysis of data retention voltage in SRAM • Simulations and results EE 241 Project

  3. V2 (V) Low-Power SRAM • Concept: Reduce the standby Vdd to data retention voltage (DRV) EE 241 Project

  4. SRAM Chip DRV Modeling DRV DRV is modeled as i.i.d. gamma random variable EE 241 Project

  5. n symbols k information symbols n-k parity symbols Error Correction Code • Adding parity check into information • Non-trivial binary code • Easy to encode • Parameters fixed • Hamming code, Golay code • Linear block code • Parameters flexible • Reed-Solomon code • Least parity overhead EE 241 Project

  6. Applying ECC to SRAM • Latency • In proportional to block size • In this project: Hamming (15,11), Golay(23,12), and RS(15,11) • Implementation characteristics are well-known EE 241 Project

  7. r redundant rows M rows N columns ECC ECC ECC ECC i info n symbols Model Setup Memory size: M× N ECC block size: n info length: i Row redundancy: r rows Standby cycles: T Metrics: EE 241 Project

  8. r redundant rows M rows N columns ECC ECC ECC ECC i info n symbols Model Analysis • For certain standby voltage, retention ability can be modeled as Bernoulli r.v. • For certain pe of a row, pe of a block can be derived • Inside a block, pe of each cell can be found by solving binomial distribution • Row redundancy can also be modeled as binomial r.v. EE 241 Project

  9. Results EE 241 Project

  10. Results (cont.) EE 241 Project

  11. Number of columns Standby Voltage (mV) Hamming RS Golay 256 201.36 194.78 176.36 512 206.53 198.59 179.26 1024 210.04 201.76 182.12 Hardware overhead (gates/bit) 9.091 22.727 58.333 Results (cont.) EE 241 Project

  12. Conclusion • Hamming code introduces the least overhead • For short waiting time, Hamming code can reduce Eb from 50% to 2x • As waiting time goes to infinity, Reed-Solomon saves the power by 3x EE 241 Project

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