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Control Processor

Control Processor. Switch Fabric. ATM Switch Core. IPP. OPP. IPP. OPP. IPP. OPP. IPP. OPP. IPP. OPP. IPP. OPP. FPX. FPX. FPX. FPX. FPX. FPX. Port Processors. SPC. SPC. SPC. SPC. SPC. SPC. LC. LC. LC. LC. LC. LC. Line Cards (link interfaces). Control Processor.

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Control Processor

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  1. ControlProcessor Switch Fabric ATM Switch Core IPP OPP IPP OPP IPP OPP IPP OPP IPP OPP IPP OPP FPX FPX FPX FPX FPX FPX Port Processors SPC SPC SPC SPC SPC SPC LC LC LC LC LC LC Line Cards (link interfaces)

  2. ControlProcessor Switch Fabric Dist. Q. Ctl. Dist. Q. Ctl. OutputPortProc. Dist. Q. Ctl. Dist. Q. Ctl. InputPortProc. . . . FlowLookup FlowLookup Flow/RouteLookup Flow/RouteLookup

  3. CP - Control Processor RA - Route Agents DQ - Distributed Queuing PP - Port Processor PCU - Plugin Control Unit WUGS - Washington University Gigabit Switch CP RM RA Configure framework Resource OSPF Signaling flexroutd Routing Discover (switch & ports) Virtual Interfaces PP PP PP PCU PCU plugin plugin plugin plugin WUGS kernel lookup lookup DQ DQ kernel PP PP PP PP PP

  4. Overall View ControlProcessor Switch Fabric ATM Switch Core PP PP PP PP PP PP Port Processors LC LC LC LC LC LC Line Cards (link interfaces)

  5. Shim contains results of classification step SPC FPX DQ Module Z.2 Active processing IP Classifier X.1 shim NID APIC Flow Control

  6. CP Control Traffic SPC/FPX SPC/FPX IP router router IP SPC/FPX SPC/FPX IP router router IP WUGS

  7. wugs 192.168.200.X 192.168.204.X P4 P0 SPC/FPX SPC/FPX Next/Prev Hop Next/Prev Hop IP fwd DQ DQ 192.168.204.2 192.168.200.2 192.168.205.X 192.168.201.X P5 P1 SPC/FPX SPC/FPX Next/Prev Hop Next/Prev Hop DQ DQ 192.168.202.X 192.168.206.X P6 P2 SPC/FPX SPC/FPX Next/Prev Hop Next/Prev Hop DQ DQ 192.168.202.2 192.168.203.X 192.168.207.X P7 P3 SPC/FPX SPC/FPX Next/Prev Hop CP IP fwd DQ DQ 192.168.203.2

  8. User Space Active Processing Environment (swint) SPC Kernel PCU active pkt Output 1 Prev Hop Flow/Route lookup Output 2 Basic IP ... Output N APIC HW Control Command/ kernel APIC HW Control Device Specific Processing Input 1 Input 2 Next Hop ... Input N interrupt set pacing Distributed Queuing (DQ) DQ Callback (rt-clock, 100usec)

  9. H H H H H M M M M M L L L L L User SW Interrupt Kernel X.1 Z.1 Y.1 swintr Plugin Control Unit SPC IP options W.1 X.2 Y.1 Z.2 Resource Manager Input 1 Flow Control Input 2 H APIC M Basic IP Processing (TTL, version, addr, options chk) Exact Match Classifier L ... Distributed Queuing Default Input port path Input N ... interrupt Output 2 Output 1 Next Hop Output N Default Output path to Next Hop Prev Hop APIC Driver APIC

  10. CP R R Port 1 SPC/FPX 2xx ATM Switch Port 3 Port 0 Port 2 43 50 VC=50 VC=51 44 lookup 42 51 Port 1 Port 3 40 40 50 43 out out 42 Host 51 44 Port 4 Port 2

  11. VP0 VP4 VP1 VP2 VP3 CP Sockets: comm endpoints RA Virtual Interfaces, Or Virtual Ports (VP) IP (udp/tcp) IP layer: routes pkts to/from sockets 201 202 203 204 50 Driver: routes pkts between interface and net layer Port 0 • Loopbacks not shown • IP Address bound to Ports IP Port 1 Port 3 63 SPC/FPX 63 SPC/FPX IP router router IP Port 2 Port 4 63 63 SPC/FPX SPC/FPX IP router router WUGS IP

  12. IP fwd wugs 192.168.200.X 192.168.204.X P4 P0 SPC/FPX SPC/FPX CP Next/Prev Hop IP fwd DQ DQ 192.168.205.X 192.168.201.X P5 P1 SPC/FPX SPC/FPX Next/Prev Hop DQ DQ 192.168.202.X 192.168.206.X P6 P2 SPC/FPX SPC/FPX Next/Prev Hop DQ DQ 192.168.202.2 192.168.203.X 192.168.207.X P7 P3 SPC/FPX SPC/FPX Next/Prev Hop Next/Prev Hop DQ DQ 192.168.203.2

  13. wugs 192.168.200.X P4 P0 SPC SPC CP Source Host DQ VC=43 VC=50 192.168.205.X P5 P1 SPC SPC Router DQ 192.168.202.X 192.168.206.X P6 P2 SPC SPC Router IP fwd 192.168.202.2 DQ DQ 192.168.203.X P7 P3 SPC SPC DQ DQ

  14. CP Port 1 SPC/FPX 2xx 43 44 lookup 42 LC 40 40 43 out out 42 44 Port 2 SPC/FPX 2xx 43 44 lookup 42 LC 40 40 43 out out 42 44 Port 0 Port 3 Port 2

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