Computer Architecture: Intro Anatomy of a CPU

Computer Architecture: Intro Anatomy of a CPU J. Schmalzel S. Mandayam

CPU MEM I/O Hierarchical View of EP and Digital Systems Operating System HLLs Computer Architecture State Machines Interface Method Design Techniques MSI Functions Boolean Algebra Gates

BlockDiagram

Concept of CPU as Two Paths • Data Path • Where data elements flow from/to • Where operations are performed • Control Path • The source of data path control

Dbus RW Register File DA AA Const MB MuxB Aout Dout FS Function Unit Status Din MD MuxD Simple Model Data Path (7-18) n-bit bus Signal BA Dbus

Instruction Word 3 3 3 1 5 1 1 DA AA BA MB FS MD RW

Iword, cont. RW to write back result AA, BA, DA: 3-bit selection field to select 1-of-8 registers RF MB to select source operand for B path FU FS to select operation MD to select source for register file load

Function Select Codes 00000 F=A 00001 F=A+1 00010 F=A+B 00011 F=A+B+1 00100 F=A+ ~B 00101 F= A+ ~B + 1 00110 F=A-1 00111 F=A 01000 F=A & B 01010 F=A | B 01100 F=AB 01110 F= ~A 10000 F=B 10100 F= sr B 11000 F= sl B

FU (ALU) Design Approaches • Complex combinatorial structure • Multiplexed discrete logical and arithmetic units • HDL model

Consider Implementation • Use organization of FS codes to partition system (use FS4 and FS3): • 00- Arithmetic • 01- Logical • 10, 11- Shift, Miscellaneous

Questions, Comments, Discussion

Computer Architecture: Intro Anatomy of a CPU