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Smarter Vision Platform Update

Explore Xilinx's smarter vision hardware platforms for SDI and video over IP, including SD/HD/3G-SDI inputs and outputs, AES audio pairs, SFP+ cage, HDMI, and more.

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Smarter Vision Platform Update

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  1. Smarter Vision Platform Update

  2. Agenda • Hardware Platforms • SDI on 7-Series • Video over IP • Video Processing • Codecs

  3. Xilinx Smarter Vision Hardware Platforms Smarter Vision

  4. KC705 Base Board + InreviumTM SDI/AES FMCs Ref Clk SD/HD/3G-SDI 2x Inputs 2x Outputs 2x Bidirectional 2x AES Audio Pairs HPC FMC Connector LPC FMC Connector SFP+ Cage 1Gb Ethernet HDMI PCI Express

  5. InreviumTM Broadcast Video Kits

  6. ZC706 Baseboard + InreviumTM SDI FMC SD/HD/3G-SDI 2x Inputs 2x Outputs 2x Bidirectional HPC FMC Connector LPC FMC Connector SFP+ Cage 1Gb Ethernet HDMI PCI Express

  7. OmniTek Zynq-7045 SoC Video Development Kit Broadcast-centric development platform

  8. InreviumTMACDC 1.0Kintex-7 Broadcast & Consumer Kit ACDC = Acquisition, Contribution, Distribution, Consumption

  9. InreviumTM FMCOption Cards FMC HPC(High Pin Count) New! 3G/HD/SD-SDI TB-FMCH-3GSDI2 SATA TB-FMCH-SATA AES Audio TB-FMCL-AUDIO V-by-One HS TB-FMCH-VBY1 DisplayPort TB-FMCH-DP HDMI1.4 TB-FMCH-HDMI2 Samtec 40-pin QSE TB-FMCH-TYPER FMC LPC(Low Pin Count) New! New! Audio24bitAD/DA TB-FMCL-ADDA24 Pin Header (2 sets) TB-FMCL-PH USB3.0 TB-FMCL-USB30 Gigabit Ethernet TB-FMCL-GLAN LVDS TB-FMCL-LVDS HDMI1.3 TB-FMCL-HDMI

  10. Xilinx Smarter Vision SDI on 7-Series Smarter Vision

  11. SDI Common Set of Deliverables

  12. Current Status of SDI on 7 Series *limited characterization

  13. SD/HD/3G-SDI on 7 series FPGAs Generic core in ISE and Vivado XAPP592 SDI with Kintex-7 GTX Transceivers XAPP892 SDI with Virtex-7 GTX Transceivers XAPP1092 SDI with Zynq-7000 GTX Transceivers XAPPxxx SDI with Artix-7 GTP Transceivers XAPPxxx SDI with Virtex-7 GTH Transceivers

  14. Beyond 3G-SDI HD 4K 8K Courtesy: Semtech

  15. 10G-SDI • Xilinx working with Japanese customers on HXT implementation • SMPTE 435 implementations • Ensuring 10Gbps transceiversare 10G-SDI compliant • For 7-Series & Beyond!

  16. 6G-SDI and 12G-SDI Plans • Xilinx investigating 6G-SDI and 12G-SDI requirements now • Early adopter customers have implemented their own 6G-SDI in 7 series • Xilinx 7 series GTs can support the required line rates • Xilinx chairs 32NF and is in receipt of all UHD-SDI proposals in to SMPTE • Xilinx working closely with all three major cable driver and EQ vendors • We are firm supporters of SMPTE standard interoperability requirements

  17. Audio App Notes, Ref Designs & LogiCORE IP • Embedded Audio on Virtex-6 FPGAs • Embedded Audio on Spartan-6 FPGAs • ASRC on Virtex-6 FPGAs • ASRC on Spartan-6 FPGAs • Pre-release XAPPs available • Request through marketing • ASRC available as LogiCORE Pre-release XAPPs available Request through marketing ASRC available as LogiCORE

  18. Smarter VisionVideo over IP Smarter Vision

  19. IEEE AVB and SMPTE 2022 Example Network Use Case AVB Network SMPTE 2022 Cameras, Switcher, Digital Signage (in stadium or studio) SMPTE 2022 Network IEEE AVB to SMPTE 2022 Bridge To OB van, studio or remote production suite on private 1Gb or 10Gb IP network

  20. Xilinx SMPTE 2022 Video Over IP workStandards of Interest • SMPTE 2022-1 • Forward Error Correction for Real-time Video/Audio Transport Over IP Networks • SMPTE 2022-2 • Unidirectional transport of constant bit rate MPEG-2 Transport Streams on IP Networks • SMPTE 2022-5 • Forward Error Correction for High Bit Rate Real-Time Video/Audio Transport over IP • SMPTE 2022-6 • High Bit Rate Contribution Oriented Video/Audio Transport over IP Networks

  21. Use Case 1: Live Events (News/Sports) Today Satellite link Lots of cabling and expensive truck rolls SDI Tomorrow Multiple channels over one cable – perfect for 3D 10Gbps Ethernet now enables uncompressed HD transport LAN/WAN SMPTE 2022 FPGA-based bridge Lower cost & power! Reduces cabling & truck rolls, saving money and being greener!

  22. Use Case 2:Remote Production of non-Live Events (Drama) In the remote production office In the studio or on location Director edits / color grades on the fly LAN/WAN SDI 10GbE SDI SMPTE 2022 or IEEE AVB FPGA-based bridge Cost & productivity improved with immediate data addition & instant production

  23. Xilinx FPGA SMPTE 2022-5,6 System SD/HD/3GCH 1RX SD/HD/3GCH 1 RX SD/HD/3GCH N RX SD/HD/3GCH 1 TX SD/HD/3GCH N TX SD/HD/3G RX Cores SD/HD/3G TX Cores Triple RateSerializer Triple RateDeserializeFormat Det Triple RateDeserializeFormat Det Triple RateSerializer RX BufferController FEC TX Engine TX Buffer Controller Time Recovery Rate Gen SMPTE 2022-5/-6 RX LogicCORE SMPTE 2022-5/-6 TX LogicCORE RTP Parser Timestamp& RTP Framer FEC RX Engine AXI Memory Controller AXI Memory Controller 10G MACLogiCORE 10G MACLogiCORE DDR3Memory DDR3Memory AXI4 AXI4 MicroBlaze Processor MicroBlaze Processor

  24. SMPTE 2022 on 7 series FPGAs IP Cores in Vivado XAPP896 SMPTE 2022-5,6 on Kintex-7 XAPPxxx SMPTE 2022-1,2 on Kintex-7

  25. Xilinx IP for SMPTE 2022 • HC = High Channel Count • Supports multiple channels of compressed streams • E.g. At least 256 TS channels • IP-in to IP-out supported. • FEC with (non) block aligned matrices • IP firewall and handshaking • Handles SDI outages and IP packet drops • Out-of-order packet handling • Timestamp generation/ extraction • Stream monitoring • FEC parameter selection on stream by stream basis • Hitless switch protection • VCXO removal integration SMPTE 2022-5,6 SMPTE 2022-1,2 LC SMPTE 2022-1,2 HC • Supports multiple SD/HD/3G-SDI channels • E.g. 6x HD-SDI or 3x 3G-SDI • Automatic SDI format recognition • FEC with (non) block aligned matrices • IP firewall and handshaking • Handles SDI outages and IP packet drops • Out-of-order packet handling • Timestamp generation/ extraction • Stream monitoring • FEC parameter selection on stream by stream basis • Hitless switch protection • VCXO removal integration • LC = Low Channel Count • Supports multiple channels of compressed streams • E.g. 8 DVB-ASI channels • ASI or TS inputs supported . • FEC with (non) block aligned matrices • IP firewall and handshaking • Handles SDI outages and IP packet drops • Out-of-order packet handling • Timestamp generation/ extraction • Stream monitoring • FEC parameter selection on stream by stream basis • Hitless switch protection • VCXO removal integration $8K site license Available Now $2K site license Available Q4CY13 $2K site license Available Q1CY14

  26. KC705 Base Board + InreviumTM SDI/GbE FMCs Ref Clk SD/HD/3G-SDI 2x Inputs 2x Outputs 2x Bidirectional 2x 1GbE (Hitless) HPC FMC Connector LPC FMC Connector SFP+ Cage 1Gb Ethernet HDMI PCI Express

  27. Xilinx SMPTE 2022 IP in VidTrans 2013 Interop SMPTE 2022-1,2 and -5,6 (plus Hitless Switching)

  28. Xilinx & Barco Silex Video over IP Ref DesignIntegrates SMPTE 2022 and JPEG-2000

  29. All-IP Studio Concept Demo with Fox Networks • Presented at SMPTE Annual Technical Conference 2013 • Written with Thomas Edwards, VP Engineering & Development Networked Broadcast Demonstration System

  30. Smarter VisionVideo Processing Smarter Vision

  31. Real Time Video Engine (RTVE) Up to 8 Channels of High Quality Video Processing

  32. RTVE Evolution

  33. OmniTek Scalable Video Processor (OSVP 1.0)IP core from OmniTek Built-in multiport video DMA to allow full scalability

  34. RTVE v2.0Kintex-7 Reference Design based on OSVP 1.0 64-bit @ 1600 MTS • Truly scalable design supporting 1-8 video channels • Feature set/performance in OmniTek brochure on SouRCe 512-bit @ 200MHz

  35. RTVE 2.0 Key Features

  36. RTVE 2.0 Demo Set Up Hardware Inventory • 1x KC705 base board • 1x Inrevium TB-FMCH-3GSDI2A card • 1x Inrevium TB-FMCH-HDMI card • 4x SD/HD/3G SDI Video Sources • 1x HDMI Video Source (optional) • 1x FHD(1080p60) HDMI Monitor • 1x WIFI Router • 1x WIFI Laptop or Mobile Device • 1x 3GSDI Monitor (optional)

  37. Web Server Based Control GUI

  38. RTVE 2.0 – Deliverables Hardware Platforms OmniTek Scalable Video Processor RTVE 2.0 Reference Design • From OmniTek.tv: • OSVP docs & collateral • Datasheet • User’s guide • OSVP Licensing Site • Xilinx KC705 • Inrevium SDI2A FMC • Inrevium HDMI1.3 FMC • Device-locked ISE • Or Inrevium K7BVK Bundle From Xilinx.com: XAPP Evaluation Lounge OmniTek Ref Design Evaluation Bitstream Loans, demos and evaluation – contact marketing

  39. RTVE 2.1 for Multichannel HD on OZ745 Real Time Video Engine Reference Design

  40. OmniTek OZ745 Video Development Kit • RRP $5,560 • SD card containing • RTVE2.1 ref design • Additional OmniTek designs • Documentation • Hardware Guide, • Quick Start Guide • Design Example Guide • PCB schematics (PDF only) • RTVE 2.1 User Guide

  41. Complete OZ745 Board Support Package

  42. RTVE 2.1 – Deliverables Hardware Platforms OmniTek Scalable Video Processor RTVE 2.1 Reference Design • From OmniTek.tv: • SD Image • OZ745 BSP • OSVP docs & collateral • Datasheet • User’s guide • OSVP Licensing Site OmniTek OZ745 Device-locked Vivado From Xilinx.com: XAPP Evaluation Lounge OmniTek Ref Design Evaluation Bitstream Loans, demos and evaluation – contact marketing

  43. OSVP 2.0 for 4K UHD on OZ745 Video Dev Kit • New features in OSVP 2.0 • 4K up/down re-size support • 6-axis Colour Correction & Conversion • Enhanced De-interlacer • Progressive to Interlace conversion • Noise Reduction • Gaussian filter Cross Fades • Image Sharpening • Multiple Overlays • Pre- and post-scaler Cropping • Frame-based register update, for smooth animated transitions • Programmable Chroma up-sampler • Further video standard support, including 3D pass through

  44. Improved Deinterlacer in OSVP 2.0 2 1 3 • 1 - New OSVP 2.0 Deinterlacer • 2 - Sobel detection in OSVP1.0 • 3 - Motion Adaptive

  45. Coming Soon! RTVE 3.0 for 4K

  46. 4K Support With 6G-SDI & DisplayPort 1.2 FMC

  47. Smarter VisionCodecs Smarter Vision

  48. Xilinx Codec Partners’ IP at a glance...... * = Roadmap / Development

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