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Computer Architecture CST 250

Computer Architecture CST 250. Number Systems in Brief Prepared by:Omar Hirzallah. Contents. The Number Systems Conversions ASCII Coding BCD Address Range Binary Numbers Binary Arithmetic (Add. & Sub.) S & M, 1’s & 2’s Complement Methods. THE NUMBER SYSTEM.

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Computer Architecture CST 250

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  1. Computer ArchitectureCST 250 Number Systems in Brief Prepared by:Omar Hirzallah

  2. Contents • The Number Systems • Conversions • ASCII Coding • BCD • Address Range • Binary Numbers • Binary Arithmetic (Add. & Sub.) • S & M, 1’s & 2’s Complement Methods

  3. THE NUMBER SYSTEM (1) Binary Number System (0,1) Base 2 (2) Octal Number System (0,1,2,3,4,5,6,7) Base 8 (3) Decimal Number System (Denary) (0,1,2,3,4,5,6,7,8,9) Base 10 (4) Hexadecimal Number System (0,1,2,3,4,5,6,7,8,9,A,B,C,D,E,F) Base 16

  4. The ASCII Code • ASCII stands for “American Standard Codes for Information Interchange”. H= 72 0 1 0 0 1 0 0 0 e= 101 0 1 1 0 0 1 0 1 l = 108 0 1 1 0 1 1 0 0 l = 108 0 1 1 0 1 1 0 0 o= 111 0 1 1 0 1 1 1 1 It’s a 7 + 1 bit method. 7 bits for code values and 1 bit for Parity check.

  5. Binary Coded Decimal

  6. The Binary Coded Decimals (BCD) ASCII Codes use 1 byte for 1 character to store Whereas BCD can be used to save memory space by putting two characters in one byte. Example: 87 can be written as

  7. THE ADDRESS RANGE: The Formula to calculate the no. of different combinations /addresses range according to the no. of bits: No. of Different Codes = 2n (Where n is no. of bits.) For Example: If there are two bits then: No. of Different Codes = 22 = 2 x 2 = 4 00 01 10 11 For Example: If there are three bits then: No. of Different Codes = 23 = 2 x 2 x 2 = 8 000 001 010 011 100 101 110 111

  8. The Binary Numbers Unsigned Binary Numbers (+) Signed Binary Numbers (+ or -) The Example of Unsigned Binary Numbers: 11001 Decimal Equivalent 25 M.S.B. L.S.B. M.S.B. Most Significance Bit L.S.B. Least Significance Bit

  9. Signed (- or +) binary numbers There are two very famous notations in dealing with • Sign & Magnitude Method (7 + 1 bit method): • 0 0 0 0 0 0 1 1 + 3 • 1 0 0 0 0 0 1 1 - 3 Sign Bit Magnitude • Complement Method (2’s complement): • 2’s Complement = 1’s complement +1 • 1’s complement : Convert all 1s to 0s and a 0s to 1s

  10. 1’s Complement :Convert all 0’s into 1’s and all 1’s into 0’s.For Example: 0 0 1 0 0 1 0 11’s Complement: 1 1 0 1 1 0 1 0 • 2’s Complement :Convert all 0’s into 1’s and all 1’s into 0’s and then add 1.For Example: 0 0 1 0 0 1 0 1 (37)1’s Complement: 1 1 0 1 1 0 1 0 __________12’s Complement: 1 1 0 1 1 0 1 1(-37) +

  11. BINARY ARITHMETIC: BINARY ADDITION: There are four Basic Rules for Binary Addition: 0 0 1 1 0+1+0+1+ 01110 FOR EXAMPLE: 1 0 0 1 1 1 0 1 0 1 1 0 + 1 1 1 1 + 1 1 1 11 1 1 0 0 1 1 1 1 1

  12. BINARY ARITHMETIC: BINARY SUBTRACTION: 1)There are four Basic Rules for Binary Subtraction: 0 1 1 0 0-0-1-1- 010Borrow FOR EXAMPLE: 1 0 0 1 0 1 1 0 - If any, otherwise impossible to solve 1 0 10 10 0 1 1 0

  13. BINARY ARITHMETIC: BINARY SUBTRACTION: 2-Use the 2’s complement method: FOR EXAMPLE: (a 4-bit number) A – B can be expressed as A + (-B) (-B) is the 2’s complement of B 0 1 0 1 – 0 0 1 1 =0101 + (-0011) =0101 + (1100+1) =0101 + 1101 =1 0010 (5) (3) (2)

  14. References • Mano, (2008). Logic and Computer Design Fundamentals, 4th ed., Prentice-Hall. • Mano, (2006),Digital Design, 4thed, Prentice Hall. • Kifer, M., &Smolka, S. A. (2007).Introduction to Operating System Design and Implementation, Springer • http://www.webopedia.com/TERM/M/microprocessor.html • www.webopedia.com/TERM/I/Intel.html‏ • www.webopedia.com/TERM/C/cache.html‏ • www.webopedia.com/quick_ref/ memory.asp‏ • http://en.wikipedia.org/wiki/Booting • www.pcguide.com/ref/mbsys/res/irq/index.htm‏ • en.wikipedia.org/wiki/Bus_(computing) • en.wikipedia.org/wiki/Addressing_mode‏ • www.cse.dmu.ac.uk/~msaf/CHIP.htm‏

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