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TMS320 C6xx

C6xx. Architecture. TMS320 C6xx. Dr. Naim Dahnoun, Bristol University, (c) Texas Instruments 2004. On Chip Ex. Memory. Off Chip Ex. Memory. Internal Buses. P E R I P H E R A L S. .D1. .D2. .M1. .M2. Regs (A0-A15). Regs (B0-B15). .L1. .L2. .S1. .S2. Control Regs . CPU.

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TMS320 C6xx

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  1. C6xx Architecture TMS320C6xx Dr. Naim Dahnoun, Bristol University, (c) Texas Instruments 2004

  2. On ChipEx. Memory Off Chip Ex. Memory Internal Buses PERIPHERALS .D1 .D2 .M1 .M2 Regs (A0-A15) Regs (B0-B15) .L1 .L2 .S1 .S2 Control Regs CPU 'C6x - System Block Diagram Harvard PC

  3. 256 32/64 32/64 32/64 32/64 32/64 'C6x - System Block Diagram Mappate in memoria I/O 32 Mappate in memoria

  4. 'C6x - Peripherals On Chip Each of these peripherals has a module dedicated to them and each of these can exist on the C6x Off Chip

  5. clk1 clk2 clk3 Ad1 Ad2 Ad3 clk0 EMIF

  6. Memory Sizeper device HARVARD Off Chip Memory Fast Slow

  7. HPI / XBUS / PCI

  8. McBSP/ASP and Utopia Bus I2C: Protocollo Seriale Sincrono (due linee bidirezionali, clock e dati sincroni, più la massa) ATM:Asynchronous Transfer Mode

  9. GPIO • LED • SWITCH

  10. DMA / EDMA

  11. Timer/ Counter

  12. Ethernet

  13. Video Ports

  14. VCP / TCP - 3G Wireless

  15. Phase Locked Loop (PLL)

  16. x8 Clock Cycle

  17. C6713 Architecture

  18. C6713-DSK Architecture

  19. CPLDs

  20. C6416Architecture

  21. Fast Slow C6416-DSK Architecture

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