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What is SDR?

Software Defined Radio on Field Programmable Gate Array Karel L STERCKX Shinawatra University, Thailand. What is SDR?. SDR aims to implement as much of the electronics of a communication system on programmable digital platforms, preferably a single platform  System On Programmable Chip (SOPC)

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What is SDR?

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  1. Software Defined Radio onField Programmable Gate ArrayKarel L STERCKXShinawatra University, Thailand

  2. What is SDR? • SDR aims to implement as much of the electronics of a communication system on programmable digital platforms, preferably a single platform  System On Programmable Chip (SOPC) • Places the analogue/digital conversion as close as possible to the antenna  Ideally • ADC immediately after the Low Noise Amplifier (LNA) • DAC in front of the RF Power Amplifier (PA) • Analogue/digital conversion at RF is not yet possible • Analogue IF/RF conversion of IQ signals is necessary • Note that phase modulation (hence, also frequency modulation) is accomplished via amplitude modulation (which is simpler) of two orthogonal carriers, called the In-phase and Quadrature-phase carriers • Figure on the next slide illustrates the present day implementation of SDR

  3. SDR Illustrated

  4. Advantages of SDR • The Digital Advantage: Merits of processing signals in digital format • More robust against noise and processing errors → Signal deviations, if not too large, are still recognised as 0 or 1 • Error coding can be added to enhance robustness against noise • More effective → E.g. FIR filter has sharp roll-off and linear phase • Requires no tuning or tweaking • The Software Advantage • Designs can be upgraded • Multiple radio standards, existing and emerging, can be supported • Designs are portable → Can run on different hardware platforms • Reconfigurable on the fly → Users can operate one radio in different countries with different communication standards • Reusability of designs or parts thereof

  5. Advantages of SDR (2) • Allows for Cognitive Radio (CR) → CR senses and responds to RF spectrum conditions • Ability to find unused spectrum (active spectrum utilisation typically falls below 5%, even in dense populated areas) • Potential to seek low-cost communication channels → E.g. VoIP via WiFi instead of cellular phone links • The System-on-Chip (Soc) Advantage: Designs • Are faster • Use less power → Especially important in battery-powered devices • Occupy less PCB space → Especially important in hand-held devices

  6. SDR Implementation Platform • Most suitable platform is the Field Programmable Gate Array (FPGA) • A single programmable chip that contains all components that are required to implement a communication system up to IF modulation • Combinational and sequential logic to implement coding • Multipliers and adders, which are essential to the implementation of modulation/demodulation • Multipliers implement mixers • Adders combine signals • Multipliers and adders combine as a multiplier-accumulator (MAC), the building block of digital filters • Phase Locked Loops (PLLs) to facilitate clock management • High-end FPGAs also enable the implementation of an embedded RISC processor • Comparison of FPGA with other programmable digital chips is provided next

  7. FPGA Software configures hardware Hardware processes data only → More effective Allows for parallel as well as sequential execution About 10 cheaper Processor Software runs on fixed hardware Hardware processes code as well as data Allows for sequential execution only About 10 higher clock speeds FPGA vs. Processor Sequential and parallel processing are illustrated on the next two slides, respectively Illustrations on these two slides were taken from the Xilinx white paper ‘Comparing and Contrasting FPGA and Microprocessor System Design and Development’ by Karen Parnell and Roger Bryner, July 21, 2004, WP213 (v1.1)

  8. Sequential Processing • Limited resources are time-shared • Used in conventional DSP processors

  9. Parallel Processing • A large number of similar resources can be configured to execute in parallel • Used to implement DSP functions on FPGA

  10. FPGA = Field Programmable Gate Array Consist of small logic elements that can be interconnected via programmable interconnects that run through run throughout the entire chip → More flexible Register (flip-flop) rich → Suitable for implementation of registers and counters Higher-level embedded functions (notably adders and multipliers) and embedded memories, facilitating Lookup Tables (LUTs) In system (re)programmable Need to be reprogrammed after power shutdown CPLD = Complex Programmable Logic Device Consist of large sum-of-product logic arrays that can be inter-connected via a centrally located Programmable interconnect Array (PIA) → More predictable time delays Limited number of flipflops → More suited for large combinational logic and complex FSMs No higher-level embedded functions and no embedded memories Need to be removed from the circuit when being (re)programmed Retain the programmed configuration after power shutdown FPGA vs. CPLD

  11. CPLD Architecture

  12. Architecture of FPGA Logic

  13. Example of FPGA Architecture: Altera Cyclone II

  14. Manufacturers • The following companies are the market leaders in FPGA manufacturing • Xilinx: www.xilinx.com • Altera: www.altera.com • Both are based in San Jose, CA, USA • FPGA related products of the market leaders are summarised on the next two slides • Other manufacturers of programmable logic are • Actel (www.actel.com) • Atmel (www.atmel.com) • Lattice (www.latticesemi.com)

  15. Xilinx FPGA Spartan Series: Low Cost Virtex Series: High Performance EasyPath: Mid range Design Software ISE System Generator for DSP → Includes automatic code generation from Simulink and MATLAB Embedded processor Name: Microblaze Type: 32-bit RISC Implemented in the logic and memory blocks of the Virtex architecture Xilinx and Altera FPGA related Products Altera • FPGA • Cyclone Series: Low Cost • Stratix Series: High Performance • Aria: Mid range • Design Software • Quartus II • DSP Builder → Includes automatic code generation from Simulink and MATLAB • Embedded processor • Name: NIOS II • Type: 32-bit RISC • Implemented in the logic and memory blocks of the Stratix architecture

  16. Useful SDR Links • SDR Forum • Non-profit international industry association dedicated to promoting the success of next generation radio technologies • Established in 1996 • Website: www.sdrforum.org • GNU Radio • Open source SDR project of the Free Software Foundation (www.fsf.org) • GNU Radio applications are primarily written using the Python programming language • Website: http://gnuradio.org/trac

  17. Thank you for your attention!Questions?Karel L STERCKX(karel@shinawatra.ac.th)

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